mirror of
https://github.com/torvalds/linux.git
synced 2024-12-04 01:51:34 +00:00
mvebu dt for 4.9 (part 2)
- convert orion5x based SoC Netgear WNR854T to devicetree - remove obsolete orion-gpio binding description -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iEYEABECAAYFAlfZac0ACgkQCwYYjhRyO9XfyQCgrTqHFOxoFH7T/MKeGMssVnSS TawAnR1gDDc313Fs6qZGeG9MWAhyzAG1 =0M3s -----END PGP SIGNATURE----- Merge tag 'mvebu-dt-4.9-2' of git://git.infradead.org/linux-mvebu into next/dt Pull "mvebu dt for 4.9 (part 2)" from Gregory CLEMENT: - convert orion5x based SoC Netgear WNR854T to devicetree - remove obsolete orion-gpio binding description * tag 'mvebu-dt-4.9-2' of git://git.infradead.org/linux-mvebu: ARM: dts: orion5x: Configure WNR854T ethernet PHY LEDs ARM: dts: orion5x: Add description for Netgear WNR854T ARM: dts: arm: orion5x: Add DT include for mv88f5181 dt-bindings: arm: add DT binding for Marvell Orion5x SoC family ARM: dts: orion5x: Add required properties for orion-wdt to DT node dt-binding: mrvl-gpio: remove orion-gpio description
This commit is contained in:
Arnd Bergmann
commit
fb90bc5060
@ -0,0 +1,25 @@
|
||||
Marvell Orion SoC Family Device Tree Bindings
|
||||
---------------------------------------------
|
||||
|
||||
Boards with a SoC of the Marvell Orion family, eg 88f5181
|
||||
|
||||
* Required root node properties:
|
||||
compatible: must contain "marvell,orion5x"
|
||||
|
||||
In addition, the above compatible shall be extended with the specific
|
||||
SoC. Currently known SoC compatibles are:
|
||||
|
||||
"marvell,orion5x-88f5181"
|
||||
"marvell,orion5x-88f5182"
|
||||
|
||||
And in addition, the compatible shall be extended with the specific
|
||||
board. Currently known boards are:
|
||||
|
||||
"buffalo,lsgl"
|
||||
"buffalo,lswsgl"
|
||||
"buffalo,lswtgl"
|
||||
"lacie,ethernet-disk-mini-v2"
|
||||
"lacie,d2-network"
|
||||
"marvell,rd-88f5182-nas"
|
||||
"maxtor,shared-storage-2"
|
||||
"netgear,wnr854t"
|
||||
@ -44,26 +44,3 @@ Example for a PXA3xx platform:
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <0x2>;
|
||||
};
|
||||
|
||||
* Marvell Orion GPIO Controller
|
||||
|
||||
Required properties:
|
||||
- compatible : Should be "marvell,orion-gpio"
|
||||
- reg : Address and length of the register set for controller.
|
||||
- gpio-controller : So we know this is a gpio controller.
|
||||
- ngpio : How many gpios this controller has.
|
||||
- interrupts : Up to 4 Interrupts for the controller.
|
||||
|
||||
Optional properties:
|
||||
- mask-offset : For SMP Orions, offset for Nth CPU
|
||||
|
||||
Example:
|
||||
|
||||
gpio0: gpio@10100 {
|
||||
compatible = "marvell,orion-gpio";
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
reg = <0x10100 0x40>;
|
||||
ngpio = <32>;
|
||||
interrupts = <35>, <36>, <37>, <38>;
|
||||
};
|
||||
|
||||
@ -598,6 +598,7 @@ dtb-$(CONFIG_ARCH_ORION5X) += \
|
||||
orion5x-linkstation-lswtgl.dtb \
|
||||
orion5x-lswsgl.dtb \
|
||||
orion5x-maxtor-shared-storage-2.dtb \
|
||||
orion5x-netgear-wnr854t.dtb \
|
||||
orion5x-rd88f5182-nas.dtb
|
||||
dtb-$(CONFIG_ARCH_PRIMA2) += \
|
||||
prima2-evb.dtb
|
||||
|
||||
49
arch/arm/boot/dts/orion5x-mv88f5181.dtsi
Normal file
49
arch/arm/boot/dts/orion5x-mv88f5181.dtsi
Normal file
@ -0,0 +1,49 @@
|
||||
/*
|
||||
* Copyright (C) 2016 Jamie Lentin <jm@lentin.co.uk>
|
||||
*
|
||||
* This file is licensed under the terms of the GNU General Public
|
||||
* License version 2. This program is licensed "as is" without any
|
||||
* warranty of any kind, whether express or implied.
|
||||
*/
|
||||
|
||||
#include "orion5x.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "marvell,orion5x-88f5181", "marvell,orion5x";
|
||||
|
||||
soc {
|
||||
compatible = "marvell,orion5x-88f5181-mbus", "simple-bus";
|
||||
|
||||
internal-regs {
|
||||
pinctrl: pinctrl@10000 {
|
||||
compatible = "marvell,88f5181-pinctrl";
|
||||
reg = <0x10000 0x8>, <0x10050 0x4>;
|
||||
};
|
||||
|
||||
core_clk: core-clocks@10030 {
|
||||
compatible = "marvell,mv88f5181-core-clock";
|
||||
reg = <0x10010 0x4>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
mbusc: mbus-controller@20000 {
|
||||
compatible = "marvell,mbus-controller";
|
||||
reg = <0x20000 0x100>, <0x1500 0x20>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
pmx_ge: pmx-ge {
|
||||
marvell,pins = "mpp8", "mpp9", "mpp10", "mpp11",
|
||||
"mpp12", "mpp13", "mpp14", "mpp15",
|
||||
"mpp16", "mpp17", "mpp18", "mpp19";
|
||||
marvell,function = "ge";
|
||||
};
|
||||
};
|
||||
|
||||
ð {
|
||||
pinctrl-0 = <&pmx_ge>;
|
||||
pinctrl-names = "default";
|
||||
};
|
||||
251
arch/arm/boot/dts/orion5x-netgear-wnr854t.dts
Normal file
251
arch/arm/boot/dts/orion5x-netgear-wnr854t.dts
Normal file
@ -0,0 +1,251 @@
|
||||
/*
|
||||
* Copyright (C) 2016 Jamie Lentin <jm@lentin.co.uk>
|
||||
*
|
||||
* This file is licensed under the terms of the GNU General Public
|
||||
* License version 2. This program is licensed "as is" without any
|
||||
* warranty of any kind, whether express or implied.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/input/input.h>
|
||||
#include "orion5x-mv88f5181.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Netgear WNR854-t";
|
||||
compatible = "netgear,wnr854t", "marvell,orion5x-88f5181",
|
||||
"marvell,orion5x";
|
||||
aliases {
|
||||
serial0 = &uart0;
|
||||
};
|
||||
|
||||
memory {
|
||||
reg = <0x00000000 0x2000000>; /* 32 MB */
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
soc {
|
||||
ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>,
|
||||
<MBUS_ID(0x09, 0x00) 0 0xf2200000 0x800>,
|
||||
<MBUS_ID(0x01, 0x0f) 0 0xf4000000 0x800000>;
|
||||
};
|
||||
|
||||
gpio-keys {
|
||||
compatible = "gpio-keys";
|
||||
pinctrl-0 = <&pmx_reset_button>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
reset {
|
||||
label = "Reset Button";
|
||||
linux,code = <KEY_RESTART>;
|
||||
gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
gpio-leds {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-0 = <&pmx_power_led &pmx_power_led_blink &pmx_wan_led>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
led@0 {
|
||||
label = "wnr854t:green:power";
|
||||
gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
led@1 {
|
||||
label = "wnr854t:blink:power";
|
||||
gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
led@2 {
|
||||
label = "wnr854t:green:wan";
|
||||
gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&devbus_bootcs {
|
||||
status = "okay";
|
||||
|
||||
devbus,keep-config;
|
||||
|
||||
flash@0 {
|
||||
compatible = "cfi-flash";
|
||||
reg = <0 0x800000>;
|
||||
bank-width = <2>;
|
||||
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
partition@0 {
|
||||
label = "kernel";
|
||||
reg = <0x0 0x100000>;
|
||||
};
|
||||
|
||||
partition@100000 {
|
||||
label = "rootfs";
|
||||
reg = <0x100000 0x660000>;
|
||||
};
|
||||
|
||||
partition@760000 {
|
||||
label = "uboot_env";
|
||||
reg = <0x760000 0x20000>;
|
||||
};
|
||||
|
||||
partition@780000 {
|
||||
label = "uboot";
|
||||
reg = <0x780000 0x80000>;
|
||||
read-only;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&mdio {
|
||||
status = "okay";
|
||||
|
||||
switch: switch@0 {
|
||||
compatible = "marvell,mv88e6085";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0>;
|
||||
dsa,member = <0 0>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
label = "lan3";
|
||||
phy-handle = <&lan3phy>;
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
label = "lan4";
|
||||
phy-handle = <&lan4phy>;
|
||||
};
|
||||
|
||||
port@2 {
|
||||
reg = <2>;
|
||||
label = "wan";
|
||||
phy-handle = <&wanphy>;
|
||||
};
|
||||
|
||||
port@3 {
|
||||
reg = <3>;
|
||||
label = "cpu";
|
||||
ethernet = <ðport>;
|
||||
};
|
||||
|
||||
port@5 {
|
||||
reg = <5>;
|
||||
label = "lan1";
|
||||
phy-handle = <&lan1phy>;
|
||||
};
|
||||
|
||||
port@7 {
|
||||
reg = <7>;
|
||||
label = "lan2";
|
||||
phy-handle = <&lan2phy>;
|
||||
};
|
||||
};
|
||||
|
||||
mdio {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
lan3phy: ethernet-phy@0 {
|
||||
/* Marvell 88E1121R (port 1) */
|
||||
compatible = "ethernet-phy-id0141.0cb0",
|
||||
"ethernet-phy-ieee802.3-c22";
|
||||
reg = <0>;
|
||||
marvell,reg-init = <3 16 0 0x1777 3 17 0 0x15>;
|
||||
};
|
||||
|
||||
lan4phy: ethernet-phy@1 {
|
||||
/* Marvell 88E1121R (port 2) */
|
||||
compatible = "ethernet-phy-id0141.0cb0",
|
||||
"ethernet-phy-ieee802.3-c22";
|
||||
reg = <1>;
|
||||
marvell,reg-init = <3 16 0 0x1777 3 17 0 0x15>;
|
||||
};
|
||||
|
||||
wanphy: ethernet-phy@2 {
|
||||
/* Marvell 88E1121R (port 1) */
|
||||
compatible = "ethernet-phy-id0141.0cb0",
|
||||
"ethernet-phy-ieee802.3-c22";
|
||||
reg = <2>;
|
||||
marvell,reg-init = <3 16 0 0x1777 3 17 0 0x15>;
|
||||
};
|
||||
|
||||
lan1phy: ethernet-phy@5 {
|
||||
/* Marvell 88E1112 */
|
||||
compatible = "ethernet-phy-id0141.0cb0",
|
||||
"ethernet-phy-ieee802.3-c22";
|
||||
reg = <5>;
|
||||
marvell,reg-init = <3 16 0 0x1777 3 17 0 0x15>;
|
||||
};
|
||||
|
||||
lan2phy: ethernet-phy@7 {
|
||||
/* Marvell 88E1112 */
|
||||
compatible = "ethernet-phy-id0141.0cb0",
|
||||
"ethernet-phy-ieee802.3-c22";
|
||||
reg = <7>;
|
||||
marvell,reg-init = <3 16 0 0x1777 3 17 0 0x15>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
ð {
|
||||
status = "okay";
|
||||
|
||||
ethernet-port@0 {
|
||||
/* Hardwired to DSA switch */
|
||||
speed = <1000>;
|
||||
duplex = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
pinctrl-0 = <&pmx_pci_gpios>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
pmx_power_led: pmx-power-led {
|
||||
marvell,pins = "mpp0";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
pmx_reset_button: pmx-reset-button {
|
||||
marvell,pins = "mpp1";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
pmx_power_led_blink: pmx-power-led-blink {
|
||||
marvell,pins = "mpp2";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
pmx_wan_led: pmx-wan-led {
|
||||
marvell,pins = "mpp3";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
pmx_pci_gpios: pmx-pci-gpios {
|
||||
marvell,pins = "mpp4";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
/* Pin 1: Tx, Pin 7: Rx, Pin 8: Gnd */
|
||||
status = "okay";
|
||||
};
|
||||
@ -144,9 +144,10 @@
|
||||
|
||||
wdt: wdt@20300 {
|
||||
compatible = "marvell,orion-wdt";
|
||||
reg = <0x20300 0x28>;
|
||||
reg = <0x20300 0x28>, <0x20108 0x4>;
|
||||
interrupt-parent = <&bridge_intc>;
|
||||
interrupts = <3>;
|
||||
clocks = <&core_clk 0>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user