diff --git a/drivers/soundwire/intel.c b/drivers/soundwire/intel.c index 1131ecb4b5e7..046c67a2a39b 100644 --- a/drivers/soundwire/intel.c +++ b/drivers/soundwire/intel.c @@ -682,55 +682,6 @@ static int intel_free_stream(struct sdw_intel *sdw, return 0; } -/* - * bank switch routines - */ - -static int intel_pre_bank_switch(struct sdw_intel *sdw) -{ - struct sdw_cdns *cdns = &sdw->cdns; - struct sdw_bus *bus = &cdns->bus; - - /* Write to register only for multi-link */ - if (!bus->multi_link) - return 0; - - sdw_intel_sync_arm(sdw); - - return 0; -} - -static int intel_post_bank_switch(struct sdw_intel *sdw) -{ - struct sdw_cdns *cdns = &sdw->cdns; - struct sdw_bus *bus = &cdns->bus; - int ret = 0; - - /* Write to register only for multi-link */ - if (!bus->multi_link) - return 0; - - mutex_lock(sdw->link_res->shim_lock); - - /* - * post_bank_switch() ops is called from the bus in loop for - * all the Masters in the steam with the expectation that - * we trigger the bankswitch for the only first Master in the list - * and do nothing for the other Masters - * - * So, set the SYNCGO bit only if CMDSYNC bit is set for any Master. - */ - if (sdw_intel_sync_check_cmdsync_unlocked(sdw)) - ret = sdw_intel_sync_go_unlocked(sdw); - - mutex_unlock(sdw->link_res->shim_lock); - - if (ret < 0) - dev_err(sdw->cdns.dev, "Post bank switch failed: %d\n", ret); - - return ret; -} - /* * DAI routines */ diff --git a/drivers/soundwire/intel.h b/drivers/soundwire/intel.h index 7a69cf755954..09d479f2c77b 100644 --- a/drivers/soundwire/intel.h +++ b/drivers/soundwire/intel.h @@ -201,4 +201,8 @@ void intel_check_clock_stop(struct sdw_intel *sdw); int intel_start_bus_after_clock_stop(struct sdw_intel *sdw); int intel_stop_bus(struct sdw_intel *sdw, bool clock_stop); +/* common bank switch routines */ +int intel_pre_bank_switch(struct sdw_intel *sdw); +int intel_post_bank_switch(struct sdw_intel *sdw); + #endif /* __SDW_INTEL_LOCAL_H */ diff --git a/drivers/soundwire/intel_bus_common.c b/drivers/soundwire/intel_bus_common.c index 9a06ab58018b..f180e3bea989 100644 --- a/drivers/soundwire/intel_bus_common.c +++ b/drivers/soundwire/intel_bus_common.c @@ -208,3 +208,52 @@ int intel_stop_bus(struct sdw_intel *sdw, bool clock_stop) return 0; } + +/* + * bank switch routines + */ + +int intel_pre_bank_switch(struct sdw_intel *sdw) +{ + struct sdw_cdns *cdns = &sdw->cdns; + struct sdw_bus *bus = &cdns->bus; + + /* Write to register only for multi-link */ + if (!bus->multi_link) + return 0; + + sdw_intel_sync_arm(sdw); + + return 0; +} + +int intel_post_bank_switch(struct sdw_intel *sdw) +{ + struct sdw_cdns *cdns = &sdw->cdns; + struct sdw_bus *bus = &cdns->bus; + int ret = 0; + + /* Write to register only for multi-link */ + if (!bus->multi_link) + return 0; + + mutex_lock(sdw->link_res->shim_lock); + + /* + * post_bank_switch() ops is called from the bus in loop for + * all the Masters in the steam with the expectation that + * we trigger the bankswitch for the only first Master in the list + * and do nothing for the other Masters + * + * So, set the SYNCGO bit only if CMDSYNC bit is set for any Master. + */ + if (sdw_intel_sync_check_cmdsync_unlocked(sdw)) + ret = sdw_intel_sync_go_unlocked(sdw); + + mutex_unlock(sdw->link_res->shim_lock); + + if (ret < 0) + dev_err(sdw->cdns.dev, "Post bank switch failed: %d\n", ret); + + return ret; +}