Minki/linux
1
0
Fork 1
mirror of https://github.com/torvalds/linux.git synced 2024-11-22 04:02:20 +00:00
Code Issues Packages Projects Releases Wiki Activity

dt-bindings: clock: rockchip: remove CLK_NR_CLKS and CLKPMU_NR_CLKS

Browse Source 
CLK_NR_CLKS and CLKPMU_NR_CLKS should not be part of the binding.
Remove since the kernel code no longer uses it.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/a3292ed0-3489-4887-8567-40ea4983c592@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This commit is contained in:
Johan Jonker 2024-08-26 18:39:46 +02:00 committed by Heiko Stuebner
parent 1a22986885
commit fb234516c5
8 changed files with 0 additions and 20 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
include/dt-bindings/clock/px30-cru.h
View File

@ -175,8 +175,6 @@
#define PCLK_CIF 352
#define PCLK_OTP_PHY 353
#define CLK_NR_CLKS (PCLK_OTP_PHY + 1)
/* pmu-clocks indices */
#define PLL_GPLL 1
@ -195,8 +193,6 @@
#define PCLK_GPIO0_PMU 20
#define PCLK_UART0_PMU 21
#define CLKPMU_NR_CLKS (PCLK_UART0_PMU + 1)
/* soft-reset indices */
#define SRST_CORE0_PO 0
#define SRST_CORE1_PO 1

2
include/dt-bindings/clock/rk3036-cru.h
View File

@ -94,8 +94,6 @@
#define HCLK_CPU 477
#define HCLK_PERI 478
#define CLK_NR_CLKS (HCLK_PERI + 1)
/* soft-reset indices */
#define SRST_CORE0 0
#define SRST_CORE1 1

2
include/dt-bindings/clock/rk3228-cru.h
View File

@ -146,8 +146,6 @@
#define HCLK_S_CRYPTO 477
#define HCLK_PERI 478
#define CLK_NR_CLKS (HCLK_PERI + 1)
/* soft-reset indices */
#define SRST_CORE0_PO 0
#define SRST_CORE1_PO 1

2
include/dt-bindings/clock/rk3288-cru.h
View File

@ -195,8 +195,6 @@
#define HCLK_CPU 477
#define HCLK_PERI 478
#define CLK_NR_CLKS (HCLK_PERI + 1)
/* soft-reset indices */
#define SRST_CORE0 0
#define SRST_CORE1 1

2
include/dt-bindings/clock/rk3308-cru.h
View File

@ -212,8 +212,6 @@
#define PCLK_CAN 233
#define PCLK_OWIRE 234
#define CLK_NR_CLKS (PCLK_OWIRE + 1)
/* soft-reset indices */
/* cru_softrst_con0 */

2
include/dt-bindings/clock/rk3328-cru.h
View File

@ -201,8 +201,6 @@
#define HCLK_RGA 340
#define HCLK_HDCP 341
#define CLK_NR_CLKS (HCLK_HDCP + 1)
/* soft-reset indices */
#define SRST_CORE0_PO 0
#define SRST_CORE1_PO 1

2
include/dt-bindings/clock/rk3368-cru.h
View File

@ -182,8 +182,6 @@
#define HCLK_BUS 477
#define HCLK_PERI 478
#define CLK_NR_CLKS (HCLK_PERI + 1)
/* soft-reset indices */
#define SRST_CORE_B0 0
#define SRST_CORE_B1 1

4
include/dt-bindings/clock/rk3399-cru.h
View File

@ -335,8 +335,6 @@
#define HCLK_SDIO_NOC 495
#define HCLK_SDIOAUDIO_NOC 496
#define CLK_NR_CLKS (HCLK_SDIOAUDIO_NOC + 1)
/* pmu-clocks indices */
#define PLL_PPLL 1
@ -378,8 +376,6 @@
#define PCLK_INTR_ARB_PMU 49
#define HCLK_NOC_PMU 50
#define CLKPMU_NR_CLKS (HCLK_NOC_PMU + 1)
/* soft-reset indices */
/* cru_softrst_con0 */