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net: dsa: mv88e6xxx: Add Hardware bridging support
Bridge support is similar for all chips supported by the mv88e6xxx code, so add the code there. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Guenter Roeck
David S. Miller
parent
b0019b70d0
commit
facd95b2e0
@ -9,6 +9,7 @@
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*/
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#include <linux/delay.h>
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#include <linux/if_bridge.h>
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#include <linux/jiffies.h>
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#include <linux/list.h>
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#include <linux/module.h>
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@ -644,6 +645,31 @@ int mv88e6xxx_eeprom_busy_wait(struct dsa_switch *ds)
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return mv88e6xxx_wait(ds, REG_GLOBAL2, 0x14, 0x8000);
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}
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/* Must be called with SMI lock held */
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static int _mv88e6xxx_wait(struct dsa_switch *ds, int reg, int offset, u16 mask)
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{
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unsigned long timeout = jiffies + HZ / 10;
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while (time_before(jiffies, timeout)) {
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int ret;
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ret = _mv88e6xxx_reg_read(ds, reg, offset);
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if (ret < 0)
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return ret;
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if (!(ret & mask))
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return 0;
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usleep_range(1000, 2000);
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}
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return -ETIMEDOUT;
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}
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/* Must be called with SMI lock held */
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static int _mv88e6xxx_atu_wait(struct dsa_switch *ds)
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{
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return _mv88e6xxx_wait(ds, REG_GLOBAL, 0x0b, ATU_BUSY);
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}
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int mv88e6xxx_phy_read_indirect(struct dsa_switch *ds, int addr, int regnum)
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{
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int ret;
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@ -717,10 +743,236 @@ int mv88e6xxx_set_eee(struct dsa_switch *ds, int port,
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return 0;
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}
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static int _mv88e6xxx_atu_cmd(struct dsa_switch *ds, int fid, u16 cmd)
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{
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int ret;
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ret = _mv88e6xxx_reg_write(ds, REG_GLOBAL, 0x01, fid);
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if (ret < 0)
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return ret;
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ret = _mv88e6xxx_reg_write(ds, REG_GLOBAL, 0x0b, cmd);
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if (ret < 0)
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return ret;
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return _mv88e6xxx_atu_wait(ds);
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}
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static int _mv88e6xxx_flush_fid(struct dsa_switch *ds, int fid)
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{
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int ret;
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ret = _mv88e6xxx_atu_wait(ds);
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if (ret < 0)
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return ret;
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return _mv88e6xxx_atu_cmd(ds, fid, ATU_CMD_FLUSH_NONSTATIC_FID);
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}
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static int mv88e6xxx_set_port_state(struct dsa_switch *ds, int port, u8 state)
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{
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struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
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int reg, ret;
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u8 oldstate;
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mutex_lock(&ps->smi_mutex);
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reg = _mv88e6xxx_reg_read(ds, REG_PORT(port), 0x04);
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if (reg < 0)
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goto abort;
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oldstate = reg & PSTATE_MASK;
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if (oldstate != state) {
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/* Flush forwarding database if we're moving a port
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* from Learning or Forwarding state to Disabled or
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* Blocking or Listening state.
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*/
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if (oldstate >= PSTATE_LEARNING && state <= PSTATE_BLOCKING) {
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ret = _mv88e6xxx_flush_fid(ds, ps->fid[port]);
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if (ret)
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goto abort;
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}
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reg = (reg & ~PSTATE_MASK) | state;
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ret = _mv88e6xxx_reg_write(ds, REG_PORT(port), 0x04, reg);
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}
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abort:
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mutex_unlock(&ps->smi_mutex);
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return ret;
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}
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/* Must be called with smi lock held */
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static int _mv88e6xxx_update_port_config(struct dsa_switch *ds, int port)
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{
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struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
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u8 fid = ps->fid[port];
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u16 reg = fid << 12;
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if (dsa_is_cpu_port(ds, port))
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reg |= ds->phys_port_mask;
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else
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reg |= (ps->bridge_mask[fid] |
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(1 << dsa_upstream_port(ds))) & ~(1 << port);
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return _mv88e6xxx_reg_write(ds, REG_PORT(port), 0x06, reg);
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}
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/* Must be called with smi lock held */
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static int _mv88e6xxx_update_bridge_config(struct dsa_switch *ds, int fid)
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{
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struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
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int port;
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u32 mask;
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int ret;
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mask = ds->phys_port_mask;
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while (mask) {
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port = __ffs(mask);
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mask &= ~(1 << port);
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if (ps->fid[port] != fid)
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continue;
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ret = _mv88e6xxx_update_port_config(ds, port);
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if (ret)
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return ret;
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}
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return _mv88e6xxx_flush_fid(ds, fid);
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}
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/* Bridge handling functions */
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int mv88e6xxx_join_bridge(struct dsa_switch *ds, int port, u32 br_port_mask)
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{
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struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
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int ret = 0;
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u32 nmask;
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int fid;
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/* If the bridge group is not empty, join that group.
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* Otherwise create a new group.
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*/
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fid = ps->fid[port];
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nmask = br_port_mask & ~(1 << port);
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if (nmask)
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fid = ps->fid[__ffs(nmask)];
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nmask = ps->bridge_mask[fid] | (1 << port);
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if (nmask != br_port_mask) {
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netdev_err(ds->ports[port],
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"join: Bridge port mask mismatch fid=%d mask=0x%x expected 0x%x\n",
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fid, br_port_mask, nmask);
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return -EINVAL;
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}
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mutex_lock(&ps->smi_mutex);
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ps->bridge_mask[fid] = br_port_mask;
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if (fid != ps->fid[port]) {
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ps->fid_mask |= 1 << ps->fid[port];
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ps->fid[port] = fid;
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ret = _mv88e6xxx_update_bridge_config(ds, fid);
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}
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mutex_unlock(&ps->smi_mutex);
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return ret;
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}
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int mv88e6xxx_leave_bridge(struct dsa_switch *ds, int port, u32 br_port_mask)
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{
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struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
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u8 fid, newfid;
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int ret;
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fid = ps->fid[port];
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if (ps->bridge_mask[fid] != br_port_mask) {
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netdev_err(ds->ports[port],
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"leave: Bridge port mask mismatch fid=%d mask=0x%x expected 0x%x\n",
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fid, br_port_mask, ps->bridge_mask[fid]);
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return -EINVAL;
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}
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/* If the port was the last port of a bridge, we are done.
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* Otherwise assign a new fid to the port, and fix up
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* the bridge configuration.
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*/
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if (br_port_mask == (1 << port))
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return 0;
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mutex_lock(&ps->smi_mutex);
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newfid = __ffs(ps->fid_mask);
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ps->fid[port] = newfid;
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ps->fid_mask &= (1 << newfid);
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ps->bridge_mask[fid] &= ~(1 << port);
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ps->bridge_mask[newfid] = 1 << port;
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ret = _mv88e6xxx_update_bridge_config(ds, fid);
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if (!ret)
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ret = _mv88e6xxx_update_bridge_config(ds, newfid);
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mutex_unlock(&ps->smi_mutex);
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return ret;
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}
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int mv88e6xxx_port_stp_update(struct dsa_switch *ds, int port, u8 state)
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{
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struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
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int stp_state;
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switch (state) {
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case BR_STATE_DISABLED:
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stp_state = PSTATE_DISABLED;
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break;
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case BR_STATE_BLOCKING:
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case BR_STATE_LISTENING:
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stp_state = PSTATE_BLOCKING;
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break;
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case BR_STATE_LEARNING:
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stp_state = PSTATE_LEARNING;
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break;
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case BR_STATE_FORWARDING:
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default:
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stp_state = PSTATE_FORWARDING;
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break;
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}
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netdev_dbg(ds->ports[port], "port state %d [%d]\n", state, stp_state);
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/* mv88e6xxx_port_stp_update may be called with softirqs disabled,
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* so we can not update the port state directly but need to schedule it.
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*/
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ps->port_state[port] = stp_state;
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set_bit(port, &ps->port_state_update_mask);
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schedule_work(&ps->bridge_work);
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return 0;
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}
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static void mv88e6xxx_bridge_work(struct work_struct *work)
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{
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struct mv88e6xxx_priv_state *ps;
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struct dsa_switch *ds;
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int port;
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ps = container_of(work, struct mv88e6xxx_priv_state, bridge_work);
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ds = ((struct dsa_switch *)ps) - 1;
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while (ps->port_state_update_mask) {
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port = __ffs(ps->port_state_update_mask);
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clear_bit(port, &ps->port_state_update_mask);
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mv88e6xxx_set_port_state(ds, port, ps->port_state[port]);
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}
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}
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int mv88e6xxx_setup_port_common(struct dsa_switch *ds, int port)
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{
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struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
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int ret, reg;
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int ret, fid;
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mutex_lock(&ps->smi_mutex);
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@ -736,13 +988,14 @@ int mv88e6xxx_setup_port_common(struct dsa_switch *ds, int port)
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* ports, and allow each of the 'real' ports to only talk to
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* the upstream port.
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*/
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reg = (port & 0xf) << 12;
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if (dsa_is_cpu_port(ds, port))
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reg |= ds->phys_port_mask;
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else
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reg |= 1 << dsa_upstream_port(ds);
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fid = __ffs(ps->fid_mask);
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ps->fid[port] = fid;
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ps->fid_mask &= ~(1 << fid);
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ret = _mv88e6xxx_reg_write(ds, REG_PORT(port), 0x06, reg);
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if (!dsa_is_cpu_port(ds, port))
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ps->bridge_mask[fid] = 1 << port;
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ret = _mv88e6xxx_update_port_config(ds, port);
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if (ret)
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goto abort;
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@ -763,6 +1016,10 @@ int mv88e6xxx_setup_common(struct dsa_switch *ds)
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mutex_init(&ps->stats_mutex);
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mutex_init(&ps->phy_mutex);
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ps->fid_mask = (1 << DSA_MAX_PORTS) - 1;
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INIT_WORK(&ps->bridge_work, mv88e6xxx_bridge_work);
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return 0;
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}
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@ -15,6 +15,20 @@
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#define REG_GLOBAL 0x1b
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#define REG_GLOBAL2 0x1c
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/* ATU commands */
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#define ATU_BUSY 0x8000
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#define ATU_CMD_FLUSH_NONSTATIC_FID (ATU_BUSY | 0x6000)
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/* port states */
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#define PSTATE_MASK 0x03
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#define PSTATE_DISABLED 0x00
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#define PSTATE_BLOCKING 0x01
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#define PSTATE_LEARNING 0x02
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#define PSTATE_FORWARDING 0x03
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struct mv88e6xxx_priv_state {
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/* When using multi-chip addressing, this mutex protects
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* access to the indirect access registers. (In single-chip
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@ -49,6 +63,17 @@ struct mv88e6xxx_priv_state {
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struct mutex eeprom_mutex;
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int id; /* switch product id */
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/* hw bridging */
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u32 fid_mask;
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u8 fid[DSA_MAX_PORTS];
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u16 bridge_mask[DSA_MAX_PORTS];
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unsigned long port_state_update_mask;
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u8 port_state[DSA_MAX_PORTS];
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struct work_struct bridge_work;
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};
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struct mv88e6xxx_hw_stat {
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@ -93,6 +118,9 @@ int mv88e6xxx_phy_write_indirect(struct dsa_switch *ds, int addr, int regnum,
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int mv88e6xxx_get_eee(struct dsa_switch *ds, int port, struct ethtool_eee *e);
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int mv88e6xxx_set_eee(struct dsa_switch *ds, int port,
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struct phy_device *phydev, struct ethtool_eee *e);
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int mv88e6xxx_join_bridge(struct dsa_switch *ds, int port, u32 br_port_mask);
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int mv88e6xxx_leave_bridge(struct dsa_switch *ds, int port, u32 br_port_mask);
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int mv88e6xxx_port_stp_update(struct dsa_switch *ds, int port, u8 state);
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extern struct dsa_switch_driver mv88e6131_switch_driver;
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extern struct dsa_switch_driver mv88e6123_61_65_switch_driver;
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