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soc: mediatek: extend bus protection API
MT2712 add "set/clear" bus control register to each control register set instead of providing only one "enable" control register, we could avoid the read-modify-write racing by declaring "bus_prot_reg_update" as "false" in scp_soc_data or declaring as "true" to use the legacy update method. By improving the mtk-infracfg bus protection implementation to support set/clear bus protection control method by IC configuration. Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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3dcf01c970
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@ -19,23 +19,33 @@
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#define INFRA_TOPAXI_PROTECTEN 0x0220
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#define INFRA_TOPAXI_PROTECTSTA1 0x0228
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#define INFRA_TOPAXI_PROTECTEN_SET 0x0260
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#define INFRA_TOPAXI_PROTECTEN_CLR 0x0264
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/**
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* mtk_infracfg_set_bus_protection - enable bus protection
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* @regmap: The infracfg regmap
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* @mask: The mask containing the protection bits to be enabled.
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* @reg_update: The boolean flag determines to set the protection bits
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* by regmap_update_bits with enable register(PROTECTEN) or
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* by regmap_write with set register(PROTECTEN_SET).
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*
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* This function enables the bus protection bits for disabled power
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* domains so that the system does not hang when some unit accesses the
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* bus while in power down.
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*/
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int mtk_infracfg_set_bus_protection(struct regmap *infracfg, u32 mask)
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int mtk_infracfg_set_bus_protection(struct regmap *infracfg, u32 mask,
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bool reg_update)
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{
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unsigned long expired;
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u32 val;
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int ret;
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regmap_update_bits(infracfg, INFRA_TOPAXI_PROTECTEN, mask, mask);
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if (reg_update)
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regmap_update_bits(infracfg, INFRA_TOPAXI_PROTECTEN, mask,
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mask);
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else
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regmap_write(infracfg, INFRA_TOPAXI_PROTECTEN_SET, mask);
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expired = jiffies + HZ;
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@ -59,16 +69,24 @@ int mtk_infracfg_set_bus_protection(struct regmap *infracfg, u32 mask)
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* mtk_infracfg_clear_bus_protection - disable bus protection
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* @regmap: The infracfg regmap
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* @mask: The mask containing the protection bits to be disabled.
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* @reg_update: The boolean flag determines to clear the protection bits
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* by regmap_update_bits with enable register(PROTECTEN) or
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* by regmap_write with clear register(PROTECTEN_CLR).
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*
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* This function disables the bus protection bits previously enabled with
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* mtk_infracfg_set_bus_protection.
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*/
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int mtk_infracfg_clear_bus_protection(struct regmap *infracfg, u32 mask)
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int mtk_infracfg_clear_bus_protection(struct regmap *infracfg, u32 mask,
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bool reg_update)
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{
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unsigned long expired;
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int ret;
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regmap_update_bits(infracfg, INFRA_TOPAXI_PROTECTEN, mask, 0);
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if (reg_update)
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regmap_update_bits(infracfg, INFRA_TOPAXI_PROTECTEN, mask, 0);
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else
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regmap_write(infracfg, INFRA_TOPAXI_PROTECTEN_CLR, mask);
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expired = jiffies + HZ;
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@ -134,6 +134,7 @@ struct scp {
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void __iomem *base;
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struct regmap *infracfg;
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struct scp_ctrl_reg ctrl_reg;
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bool bus_prot_reg_update;
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};
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struct scp_subdomain {
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@ -147,6 +148,7 @@ struct scp_soc_data {
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const struct scp_subdomain *subdomains;
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int num_subdomains;
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const struct scp_ctrl_reg regs;
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bool bus_prot_reg_update;
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};
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static int scpsys_domain_is_on(struct scp_domain *scpd)
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@ -254,7 +256,8 @@ static int scpsys_power_on(struct generic_pm_domain *genpd)
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if (scpd->data->bus_prot_mask) {
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ret = mtk_infracfg_clear_bus_protection(scp->infracfg,
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scpd->data->bus_prot_mask);
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scpd->data->bus_prot_mask,
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scp->bus_prot_reg_update);
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if (ret)
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goto err_pwr_ack;
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}
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@ -289,7 +292,8 @@ static int scpsys_power_off(struct generic_pm_domain *genpd)
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if (scpd->data->bus_prot_mask) {
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ret = mtk_infracfg_set_bus_protection(scp->infracfg,
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scpd->data->bus_prot_mask);
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scpd->data->bus_prot_mask,
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scp->bus_prot_reg_update);
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if (ret)
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goto out;
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}
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@ -371,7 +375,8 @@ static void init_clks(struct platform_device *pdev, struct clk **clk)
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static struct scp *init_scp(struct platform_device *pdev,
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const struct scp_domain_data *scp_domain_data, int num,
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const struct scp_ctrl_reg *scp_ctrl_reg)
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const struct scp_ctrl_reg *scp_ctrl_reg,
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bool bus_prot_reg_update)
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{
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struct genpd_onecell_data *pd_data;
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struct resource *res;
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@ -386,6 +391,8 @@ static struct scp *init_scp(struct platform_device *pdev,
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scp->ctrl_reg.pwr_sta_offs = scp_ctrl_reg->pwr_sta_offs;
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scp->ctrl_reg.pwr_sta2nd_offs = scp_ctrl_reg->pwr_sta2nd_offs;
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scp->bus_prot_reg_update = bus_prot_reg_update;
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scp->dev = &pdev->dev;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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@ -806,7 +813,8 @@ static const struct scp_soc_data mt2701_data = {
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.regs = {
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.pwr_sta_offs = SPM_PWR_STATUS,
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.pwr_sta2nd_offs = SPM_PWR_STATUS_2ND
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}
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},
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.bus_prot_reg_update = true,
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};
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static const struct scp_soc_data mt6797_data = {
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@ -817,7 +825,8 @@ static const struct scp_soc_data mt6797_data = {
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.regs = {
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.pwr_sta_offs = SPM_PWR_STATUS_MT6797,
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.pwr_sta2nd_offs = SPM_PWR_STATUS_2ND_MT6797
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}
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},
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.bus_prot_reg_update = true,
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};
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static const struct scp_soc_data mt7622_data = {
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@ -826,7 +835,8 @@ static const struct scp_soc_data mt7622_data = {
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.regs = {
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.pwr_sta_offs = SPM_PWR_STATUS,
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.pwr_sta2nd_offs = SPM_PWR_STATUS_2ND
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}
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},
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.bus_prot_reg_update = true,
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};
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static const struct scp_soc_data mt8173_data = {
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@ -837,7 +847,8 @@ static const struct scp_soc_data mt8173_data = {
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.regs = {
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.pwr_sta_offs = SPM_PWR_STATUS,
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.pwr_sta2nd_offs = SPM_PWR_STATUS_2ND
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}
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},
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.bus_prot_reg_update = true,
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};
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/*
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@ -874,7 +885,8 @@ static int scpsys_probe(struct platform_device *pdev)
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match = of_match_device(of_scpsys_match_tbl, &pdev->dev);
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soc = (const struct scp_soc_data *)match->data;
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scp = init_scp(pdev, soc->domains, soc->num_domains, &soc->regs);
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scp = init_scp(pdev, soc->domains, soc->num_domains, &soc->regs,
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soc->bus_prot_reg_update);
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if (IS_ERR(scp))
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return PTR_ERR(scp);
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@ -28,7 +28,8 @@
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#define MT7622_TOP_AXI_PROT_EN_WB (BIT(2) | BIT(6) | \
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BIT(7) | BIT(8))
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int mtk_infracfg_set_bus_protection(struct regmap *infracfg, u32 mask);
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int mtk_infracfg_clear_bus_protection(struct regmap *infracfg, u32 mask);
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int mtk_infracfg_set_bus_protection(struct regmap *infracfg, u32 mask,
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bool reg_update);
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int mtk_infracfg_clear_bus_protection(struct regmap *infracfg, u32 mask,
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bool reg_update);
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#endif /* __SOC_MEDIATEK_INFRACFG_H */
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