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mtd: spi-nor: Zap unneeded write_enable from write_reg

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The 'write_enable' argument is unused and unneeded, so remove it from
the API.

Signed-off-by: Jagan Teki <jteki@openedev.com>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Han Xu <han.xu@freescale.com>
[Brian: fixed for nxp-spifi.c]
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
This commit is contained in:
Jagan Teki 2015-08-19 15:26:44 +05:30 committed by Brian Norris
parent fd7252346b
commit f9f3ce835d
5 changed files with 12 additions and 16 deletions
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3
drivers/mtd/devices/m25p80.c
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@ -61,8 +61,7 @@ static int m25p_cmdsz(struct spi_nor *nor)
return 1 + nor->addr_width; return 1 + nor->addr_width;
} }
static int m25p80_write_reg(struct spi_nor *nor, u8 opcode, u8 *buf, int len, static int m25p80_write_reg(struct spi_nor *nor, u8 opcode, u8 *buf, int len)
int wr_en)
{ {
struct m25p *flash = nor->priv; struct m25p *flash = nor->priv;
struct spi_device *spi = flash->spi; struct spi_device *spi = flash->spi;

3
drivers/mtd/spi-nor/fsl-quadspi.c
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@ -797,8 +797,7 @@ static int fsl_qspi_read_reg(struct spi_nor *nor, u8 opcode, u8 *buf, int len)
return 0; return 0;
} }
static int fsl_qspi_write_reg(struct spi_nor *nor, u8 opcode, u8 *buf, int len, static int fsl_qspi_write_reg(struct spi_nor *nor, u8 opcode, u8 *buf, int len)
int write_enable)
{ {
struct fsl_qspi *q = nor->priv; struct fsl_qspi *q = nor->priv;
int ret; int ret;

3
drivers/mtd/spi-nor/nxp-spifi.c
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@ -149,8 +149,7 @@ static int nxp_spifi_read_reg(struct spi_nor *nor, u8 opcode, u8 *buf, int len)
return nxp_spifi_wait_for_cmd(spifi); return nxp_spifi_wait_for_cmd(spifi);
} }
static int nxp_spifi_write_reg(struct spi_nor *nor, u8 opcode, u8 *buf, static int nxp_spifi_write_reg(struct spi_nor *nor, u8 opcode, u8 *buf, int len)
int len, int write_enable)
{ {
struct nxp_spifi *spifi = nor->priv; struct nxp_spifi *spifi = nor->priv;
u32 cmd; u32 cmd;

16
drivers/mtd/spi-nor/spi-nor.c
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@ -145,7 +145,7 @@ static inline int spi_nor_read_dummy_cycles(struct spi_nor *nor)
static inline int write_sr(struct spi_nor *nor, u8 val) static inline int write_sr(struct spi_nor *nor, u8 val)
{ {
nor->cmd_buf[0] = val; nor->cmd_buf[0] = val;
return nor->write_reg(nor, SPINOR_OP_WRSR, nor->cmd_buf, 1, 0); return nor->write_reg(nor, SPINOR_OP_WRSR, nor->cmd_buf, 1);
} }
/* /*
@ -154,7 +154,7 @@ static inline int write_sr(struct spi_nor *nor, u8 val)
*/ */
static inline int write_enable(struct spi_nor *nor) static inline int write_enable(struct spi_nor *nor)
{ {
return nor->write_reg(nor, SPINOR_OP_WREN, NULL, 0, 0); return nor->write_reg(nor, SPINOR_OP_WREN, NULL, 0);
} }
/* /*
@ -162,7 +162,7 @@ static inline int write_enable(struct spi_nor *nor)
*/ */
static inline int write_disable(struct spi_nor *nor) static inline int write_disable(struct spi_nor *nor)
{ {
return nor->write_reg(nor, SPINOR_OP_WRDI, NULL, 0, 0); return nor->write_reg(nor, SPINOR_OP_WRDI, NULL, 0);
} }
static inline struct spi_nor *mtd_to_spi_nor(struct mtd_info *mtd) static inline struct spi_nor *mtd_to_spi_nor(struct mtd_info *mtd)
@ -188,7 +188,7 @@ static inline int set_4byte(struct spi_nor *nor, const struct flash_info *info,
write_enable(nor); write_enable(nor);
cmd = enable ? SPINOR_OP_EN4B : SPINOR_OP_EX4B; cmd = enable ? SPINOR_OP_EN4B : SPINOR_OP_EX4B;
status = nor->write_reg(nor, cmd, NULL, 0, 0); status = nor->write_reg(nor, cmd, NULL, 0);
if (need_wren) if (need_wren)
write_disable(nor); write_disable(nor);
@ -196,7 +196,7 @@ static inline int set_4byte(struct spi_nor *nor, const struct flash_info *info,
default: default:
/* Spansion style */ /* Spansion style */
nor->cmd_buf[0] = enable << 7; nor->cmd_buf[0] = enable << 7;
return nor->write_reg(nor, SPINOR_OP_BRWR, nor->cmd_buf, 1, 0); return nor->write_reg(nor, SPINOR_OP_BRWR, nor->cmd_buf, 1);
} }
} }
static inline int spi_nor_sr_ready(struct spi_nor *nor) static inline int spi_nor_sr_ready(struct spi_nor *nor)
@ -267,7 +267,7 @@ static int erase_chip(struct spi_nor *nor)
{ {
dev_dbg(nor->dev, " %lldKiB\n", (long long)(nor->mtd.size >> 10)); dev_dbg(nor->dev, " %lldKiB\n", (long long)(nor->mtd.size >> 10));
return nor->write_reg(nor, SPINOR_OP_CHIP_ERASE, NULL, 0, 0); return nor->write_reg(nor, SPINOR_OP_CHIP_ERASE, NULL, 0);
} }
static int spi_nor_lock_and_prep(struct spi_nor *nor, enum spi_nor_ops ops) static int spi_nor_lock_and_prep(struct spi_nor *nor, enum spi_nor_ops ops)
@ -893,7 +893,7 @@ static int write_sr_cr(struct spi_nor *nor, u16 val)
nor->cmd_buf[0] = val & 0xff; nor->cmd_buf[0] = val & 0xff;
nor->cmd_buf[1] = (val >> 8); nor->cmd_buf[1] = (val >> 8);
return nor->write_reg(nor, SPINOR_OP_WRSR, nor->cmd_buf, 2, 0); return nor->write_reg(nor, SPINOR_OP_WRSR, nor->cmd_buf, 2);
} }
static int spansion_quad_enable(struct spi_nor *nor) static int spansion_quad_enable(struct spi_nor *nor)
@ -935,7 +935,7 @@ static int micron_quad_enable(struct spi_nor *nor)
/* set EVCR, enable quad I/O */ /* set EVCR, enable quad I/O */
nor->cmd_buf[0] = val & ~EVCR_QUAD_EN_MICRON; nor->cmd_buf[0] = val & ~EVCR_QUAD_EN_MICRON;
ret = nor->write_reg(nor, SPINOR_OP_WD_EVCR, nor->cmd_buf, 1, 0); ret = nor->write_reg(nor, SPINOR_OP_WD_EVCR, nor->cmd_buf, 1);
if (ret < 0) { if (ret < 0) {
dev_err(nor->dev, "error while writing EVCR register\n"); dev_err(nor->dev, "error while writing EVCR register\n");
return ret; return ret;

3
include/linux/mtd/spi-nor.h
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@ -186,8 +186,7 @@ struct spi_nor {
int (*write_xfer)(struct spi_nor *nor, struct spi_nor_xfer_cfg *cfg, int (*write_xfer)(struct spi_nor *nor, struct spi_nor_xfer_cfg *cfg,
u8 *buf, size_t len); u8 *buf, size_t len);
int (*read_reg)(struct spi_nor *nor, u8 opcode, u8 *buf, int len); int (*read_reg)(struct spi_nor *nor, u8 opcode, u8 *buf, int len);
int (*write_reg)(struct spi_nor *nor, u8 opcode, u8 *buf, int len, int (*write_reg)(struct spi_nor *nor, u8 opcode, u8 *buf, int len);
int write_enable);
int (*read)(struct spi_nor *nor, loff_t from, int (*read)(struct spi_nor *nor, loff_t from,
size_t len, size_t *retlen, u_char *read_buf); size_t len, size_t *retlen, u_char *read_buf);