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RISC-V Devicetrees for v6.9

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Sophgo:
 Added reset support for SG2042.
 Also updated maintainer information for SOPHGO vendor support.
 
 Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
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Merge tag 'riscv-sophgo-dt-for-v6.9' of https://github.com/sophgo/linux into soc/dt

RISC-V Devicetrees for v6.9

Sophgo:
Added reset support for SG2042.
Also updated maintainer information for SOPHGO vendor support.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>

* tag 'riscv-sophgo-dt-for-v6.9' of https://github.com/sophgo/linux:
  MAINTAINERS: Setup proper info for SOPHGO vendor support
  riscv: dts: add resets property for uart node
  riscv: dts: add reset generator for Sophgo SG2042 SoC

Link: https://lore.kernel.org/r/MA0P287MB2822315119DA51FF95EE3071FE5D2@MA0P287MB2822.INDP287.PROD.OUTLOOK.COM
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2024-03-04 08:31:44 +01:00
commit f9c59f2482
2 changed files with 15 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
MAINTAINERS
View File

@ -18859,6 +18859,7 @@ F: Documentation/devicetree/bindings/riscv/
F: arch/riscv/boot/dts/
X: arch/riscv/boot/dts/allwinner/
X: arch/riscv/boot/dts/renesas/
X: arch/riscv/boot/dts/sophgo/
RISC-V PMU DRIVERS
M: Atish Patra <atishp@atishpatra.org>
@ -20457,12 +20458,13 @@ F: drivers/char/sonypi.c
F: drivers/platform/x86/sony-laptop.c
F: include/linux/sony-laptop.h
SOPHGO DEVICETREES
M: Chao Wei <chao.wei@sophgo.com>
SOPHGO DEVICETREES and DRIVERS
M: Chen Wang <unicorn_wang@outlook.com>
M: Inochi Amaoto <inochiama@outlook.com>
T: git https://github.com/sophgo/linux.git
S: Maintained
F: arch/riscv/boot/dts/sophgo/
F: Documentation/devicetree/bindings/riscv/sophgo.yaml
N: sophgo
K: sophgo
SOUND
M: Jaroslav Kysela <perex@perex.cz>

9
arch/riscv/boot/dts/sophgo/sg2042.dtsi
View File

@ -6,6 +6,8 @@
/dts-v1/;
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/reset/sophgo,sg2042-reset.h>
#include "sg2042-cpus.dtsi"
/ {
@ -327,6 +329,12 @@
riscv,ndev = <224>;
};
rstgen: reset-controller@7030013000 {
compatible = "sophgo,sg2042-reset";
reg = <0x00000070 0x30013000 0x00000000 0x0000000c>;
#reset-cells = <1>;
};
uart0: serial@7040000000 {
compatible = "snps,dw-apb-uart";
reg = <0x00000070 0x40000000 0x00000000 0x00001000>;
@ -335,6 +343,7 @@
clock-frequency = <500000000>;
reg-shift = <2>;
reg-io-width = <4>;
resets = <&rstgen RST_UART0>;
status = "disabled";
};
};