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powerpc: Merge pci.h
This involves some minor changes: a few unused functions that the ppc32 pci.c provides are no longer declared here or exported; pcibios_assign_all_busses now just refers to the pci_assign_all_buses variable on both 32-bit and 64-bit; pcibios_scan_all_fns is now just 0 instead of a function that always returns 0 on 64-bit. Signed-off-by: Paul Mackerras <paulus@samba.org>
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@ -40,7 +40,7 @@
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#endif
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unsigned long pci_probe_only = 1;
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unsigned long pci_assign_all_buses = 0;
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int pci_assign_all_buses = 0;
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/*
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* legal IO pages under MAX_ISA_PORT. This is to ensure we don't touch
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@ -55,11 +55,6 @@ static void fixup_resource(struct resource *res, struct pci_dev *dev);
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static void do_bus_setup(struct pci_bus *bus);
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#endif
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unsigned int pcibios_assign_all_busses(void)
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{
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return pci_assign_all_buses;
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}
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/* pci_io_base -- the base address from which io bars are offsets.
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* This is the lowest I/O base address (so bar values are always positive),
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* and it *must* be the start of ISA space if an ISA bus exists because
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@ -1186,17 +1181,6 @@ void phbs_remap_io(void)
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remap_bus_range(hose->bus);
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}
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/*
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* ppc64 can have multifunction devices that do not respond to function 0.
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* In this case we must scan all functions.
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* XXX this can go now, we use the OF device tree in all the
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* cases that caused problems. -- paulus
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*/
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int pcibios_scan_all_fns(struct pci_bus *bus, int devfn)
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{
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return 0;
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}
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static void __devinit fixup_resource(struct resource *res, struct pci_dev *dev)
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{
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struct pci_controller *hose = pci_bus_to_host(dev->bus);
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@ -146,9 +146,6 @@ EXPORT_SYMBOL(pci_bus_io_base);
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EXPORT_SYMBOL(pci_bus_io_base_phys);
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EXPORT_SYMBOL(pci_bus_mem_base_phys);
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EXPORT_SYMBOL(pci_bus_to_hose);
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EXPORT_SYMBOL(pci_resource_to_bus);
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EXPORT_SYMBOL(pci_phys_to_bus);
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EXPORT_SYMBOL(pci_bus_to_phys);
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#endif /* CONFIG_PCI */
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#ifdef CONFIG_NOT_COHERENT_CACHE
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@ -1,5 +1,5 @@
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#ifndef __PPC64_PCI_H
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#define __PPC64_PCI_H
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#ifndef __ASM_POWERPC_PCI_H
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#define __ASM_POWERPC_PCI_H
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#ifdef __KERNEL__
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/*
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@ -18,6 +18,7 @@
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#include <asm/scatterlist.h>
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#include <asm/io.h>
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#include <asm/prom.h>
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#include <asm/pci-bridge.h>
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#include <asm-generic/pci-dma-compat.h>
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@ -26,11 +27,21 @@
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struct pci_dev;
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#ifdef CONFIG_PPC_ISERIES
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/* Values for the `which' argument to sys_pciconfig_iobase syscall. */
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#define IOBASE_BRIDGE_NUMBER 0
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#define IOBASE_MEMORY 1
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#define IOBASE_IO 2
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#define IOBASE_ISA_IO 3
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#define IOBASE_ISA_MEM 4
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/*
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* Set this to 1 if you want the kernel to re-assign all PCI
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* bus numbers
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*/
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extern int pci_assign_all_buses;
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#define pcibios_assign_all_busses() (pci_assign_all_buses)
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#define pcibios_scan_all_fns(a, b) 0
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#else
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extern int pcibios_scan_all_fns(struct pci_bus *bus, int devfn);
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#endif
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static inline void pcibios_set_master(struct pci_dev *dev)
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{
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@ -50,6 +61,7 @@ static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
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return channel ? 15 : 14;
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}
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#ifdef CONFIG_PPC64
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#define HAVE_ARCH_PCI_MWI 1
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static inline int pcibios_prep_mwi(struct pci_dev *dev)
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{
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@ -64,12 +76,10 @@ static inline int pcibios_prep_mwi(struct pci_dev *dev)
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return 0;
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}
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extern unsigned int pcibios_assign_all_busses(void);
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extern struct dma_mapping_ops pci_dma_ops;
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/* For DAC DMA, we currently don't support it by default, but
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* we let the platform override this
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* we let 64-bit platforms override this.
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*/
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static inline int pci_dac_dma_supported(struct pci_dev *hwdev,u64 mask)
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{
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@ -102,6 +112,35 @@ extern int pci_domain_nr(struct pci_bus *bus);
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/* Decide whether to display the domain number in /proc */
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extern int pci_proc_domain(struct pci_bus *bus);
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#else /* 32-bit */
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#ifdef CONFIG_PCI
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static inline void pci_dma_burst_advice(struct pci_dev *pdev,
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enum pci_dma_burst_strategy *strat,
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unsigned long *strategy_parameter)
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{
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*strat = PCI_DMA_BURST_INFINITY;
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*strategy_parameter = ~0UL;
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}
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#endif
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/*
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* At present there are very few 32-bit PPC machines that can have
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* memory above the 4GB point, and we don't support that.
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*/
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#define pci_dac_dma_supported(pci_dev, mask) (0)
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/* Return the index of the PCI controller for device PDEV. */
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#define pci_domain_nr(bus) ((struct pci_controller *)(bus)->sysdata)->index
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/* Set the name of the bus as it appears in /proc/bus/pci */
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static inline int pci_proc_domain(struct pci_bus *bus)
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{
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return 0;
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}
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#endif /* CONFIG_PPC64 */
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struct vm_area_struct;
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/* Map a range of PCI memory or I/O space for a device into user space */
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int pci_mmap_page_range(struct pci_dev *pdev, struct vm_area_struct *vma,
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@ -110,6 +149,7 @@ int pci_mmap_page_range(struct pci_dev *pdev, struct vm_area_struct *vma,
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/* Tell drivers/pci/proc.c that we have pci_mmap_page_range() */
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#define HAVE_PCI_MMAP 1
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#ifdef CONFIG_PPC64
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/* pci_unmap_{single,page} is not a nop, thus... */
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#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \
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dma_addr_t ADDR_NAME;
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@ -124,22 +164,40 @@ int pci_mmap_page_range(struct pci_dev *pdev, struct vm_area_struct *vma,
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#define pci_unmap_len_set(PTR, LEN_NAME, VAL) \
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(((PTR)->LEN_NAME) = (VAL))
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/* The PCI address space does equal the physical memory
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* address space. The networking and block device layers use
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/* The PCI address space does not equal the physical memory address
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* space (we have an IOMMU). The IDE and SCSI device layers use
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* this boolean for bounce buffer decisions.
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*/
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#define PCI_DMA_BUS_IS_PHYS (0)
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#else /* 32-bit */
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/* The PCI address space does equal the physical memory
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* address space (no IOMMU). The IDE and SCSI device layers use
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* this boolean for bounce buffer decisions.
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*/
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#define PCI_DMA_BUS_IS_PHYS (1)
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/* pci_unmap_{page,single} is a nop so... */
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#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)
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#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)
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#define pci_unmap_addr(PTR, ADDR_NAME) (0)
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#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
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#define pci_unmap_len(PTR, LEN_NAME) (0)
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#define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0)
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#endif /* CONFIG_PPC64 */
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extern void
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pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
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extern void pcibios_resource_to_bus(struct pci_dev *dev,
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struct pci_bus_region *region,
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struct resource *res);
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extern void
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pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
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extern void pcibios_bus_to_resource(struct pci_dev *dev,
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struct resource *res,
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struct pci_bus_region *region);
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static inline struct resource *
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pcibios_select_root(struct pci_dev *pdev, struct resource *res)
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static inline struct resource *pcibios_select_root(struct pci_dev *pdev,
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struct resource *res)
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{
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struct resource *root = NULL;
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@ -151,14 +209,12 @@ pcibios_select_root(struct pci_dev *pdev, struct resource *res)
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return root;
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}
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extern int
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unmap_bus_range(struct pci_bus *bus);
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extern int unmap_bus_range(struct pci_bus *bus);
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extern int
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remap_bus_range(struct pci_bus *bus);
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extern int remap_bus_range(struct pci_bus *bus);
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extern void
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pcibios_fixup_device_resources(struct pci_dev *dev, struct pci_bus *bus);
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extern void pcibios_fixup_device_resources(struct pci_dev *dev,
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struct pci_bus *bus);
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extern struct pci_controller *init_phb_dynamic(struct device_node *dn);
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@ -180,14 +236,12 @@ extern pgprot_t pci_phys_mem_access_prot(struct file *file,
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unsigned long size,
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pgprot_t prot);
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#ifdef CONFIG_PPC_MULTIPLATFORM
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#if defined(CONFIG_PPC_MULTIPLATFORM) || defined(CONFIG_PPC32)
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#define HAVE_ARCH_PCI_RESOURCE_TO_USER
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extern void pci_resource_to_user(const struct pci_dev *dev, int bar,
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const struct resource *rsrc,
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u64 *start, u64 *end);
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#endif /* CONFIG_PPC_MULTIPLATFORM */
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#endif /* CONFIG_PPC_MULTIPLATFORM || CONFIG_PPC32 */
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#endif /* __KERNEL__ */
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#endif /* __PPC64_PCI_H */
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#endif /* __ASM_POWERPC_PCI_H */
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@ -48,8 +48,6 @@ extern void pSeries_final_fixup(void);
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extern void pSeries_irq_bus_setup(struct pci_bus *bus);
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extern unsigned long pci_probe_only;
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extern unsigned long pci_assign_all_buses;
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extern int pci_read_irq_line(struct pci_dev *pci_dev);
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/* ---- EEH internal-use-only related routines ---- */
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#ifdef CONFIG_EEH
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