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media: i2c: fix several typos
Use codespell to fix lots of typos over frontends. Manually verified to avoid false-positives. Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org> Acked-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
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@ -219,7 +219,7 @@ static int adv7175_s_std_output(struct v4l2_subdev *sd, v4l2_std_id std)
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* SECAM->PAL (typically it does not work
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* due to genlock: when decoder is in SECAM
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* and encoder in in PAL the subcarrier can
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* not be syncronized with horizontal
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* not be synchronized with horizontal
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* quency) */
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adv7175_write_block(sd, init_pal, sizeof(init_pal));
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if (encoder->input == 0)
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@ -3102,11 +3102,11 @@ static int adv7842_ddr_ram_test(struct v4l2_subdev *sd)
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io_write(sd, 0x00, 0x01); /* Program SDP 4x1 */
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io_write(sd, 0x01, 0x00); /* Program SDP mode */
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afe_write(sd, 0x80, 0x92); /* SDP Recommeneded Write */
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afe_write(sd, 0x9B, 0x01); /* SDP Recommeneded Write ADV7844ES1 */
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afe_write(sd, 0x9C, 0x60); /* SDP Recommeneded Write ADV7844ES1 */
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afe_write(sd, 0x9E, 0x02); /* SDP Recommeneded Write ADV7844ES1 */
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afe_write(sd, 0xA0, 0x0B); /* SDP Recommeneded Write ADV7844ES1 */
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afe_write(sd, 0x80, 0x92); /* SDP Recommended Write */
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afe_write(sd, 0x9B, 0x01); /* SDP Recommended Write ADV7844ES1 */
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afe_write(sd, 0x9C, 0x60); /* SDP Recommended Write ADV7844ES1 */
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afe_write(sd, 0x9E, 0x02); /* SDP Recommended Write ADV7844ES1 */
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afe_write(sd, 0xA0, 0x0B); /* SDP Recommended Write ADV7844ES1 */
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afe_write(sd, 0xC3, 0x02); /* Memory BIST Initialisation */
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io_write(sd, 0x0C, 0x40); /* Power up ADV7844 */
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io_write(sd, 0x15, 0xBA); /* Enable outputs */
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@ -164,12 +164,12 @@ static int bt819_init(struct v4l2_subdev *sd)
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0x0e, 0xb4, /* 0x0e Chroma Gain (V) msb */
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0x0f, 0x00, /* 0x0f Hue control */
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0x12, 0x04, /* 0x12 Output Format */
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0x13, 0x20, /* 0x13 Vertial Scaling msb 0x00
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0x13, 0x20, /* 0x13 Vertical Scaling msb 0x00
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chroma comb OFF, line drop scaling, interlace scaling
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BUG? Why does turning the chroma comb on fuck up color?
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Bug in the bt819 stepping on my board?
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*/
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0x14, 0x00, /* 0x14 Vertial Scaling lsb */
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0x14, 0x00, /* 0x14 Vertical Scaling lsb */
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0x16, 0x07, /* 0x16 Video Timing Polarity
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ACTIVE=active low
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FIELD: high=odd,
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@ -66,7 +66,7 @@ enum cx25840_media_pads {
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* @is_initialized: whether we have already loaded firmware into the chip
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* and initialized it
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* @vbi_regs_offset: offset of vbi regs
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* @fw_wait: wait queue to wake an initalization function up when
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* @fw_wait: wait queue to wake an initialization function up when
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* firmware loading (on a separate workqueue) finishes
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* @fw_work: a work that actually loads the firmware on a separate
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* workqueue
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@ -549,7 +549,7 @@ int cx25840_ir_irq_handler(struct v4l2_subdev *sd, u32 status, bool *handled)
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ror = stats & STATS_ROR; /* Rx FIFO Over Run */
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tse = irqen & IRQEN_TSE; /* Tx FIFO Service Request IRQ Enable */
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rse = irqen & IRQEN_RSE; /* Rx FIFO Service Reuqest IRQ Enable */
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rse = irqen & IRQEN_RSE; /* Rx FIFO Service Request IRQ Enable */
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rte = irqen & IRQEN_RTE; /* Rx Pulse Width Timer Time Out IRQ Enable */
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roe = irqen & IRQEN_ROE; /* Rx FIFO Over Run IRQ Enable */
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@ -638,7 +638,7 @@ int cx25840_ir_irq_handler(struct v4l2_subdev *sd, u32 status, bool *handled)
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events |= V4L2_SUBDEV_IR_RX_END_OF_RX_DETECTED;
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}
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if (v) {
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/* Clear STATS_ROR & STATS_RTO as needed by reseting hardware */
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/* Clear STATS_ROR & STATS_RTO as needed by resetting hardware */
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cx25840_write4(c, CX25840_IR_CNTRL_REG, cntrl & ~v);
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cx25840_write4(c, CX25840_IR_CNTRL_REG, cntrl);
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*handled = true;
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@ -79,7 +79,7 @@ static struct et8ek8_reglist mode1_poweron_mode2_16vga_2592x1968_12_07fps = {
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{ ET8EK8_REG_8BIT, 0x1258, 0x00 },
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/* From parallel out to serial out */
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{ ET8EK8_REG_8BIT, 0x125D, 0x88 },
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/* From w/ embeded data to w/o embeded data */
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/* From w/ embedded data to w/o embedded data */
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{ ET8EK8_REG_8BIT, 0x125E, 0xC0 },
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/* CCP2 out is from STOP to ACTIVE */
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{ ET8EK8_REG_8BIT, 0x1263, 0x98 },
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@ -377,7 +377,7 @@ static const struct reg_8 mode_table_common[] = {
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/* Moire reduction */
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{0x6957, 0x01},
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/* image enhancment */
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/* image enhancement */
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{0x6987, 0x17},
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{0x698A, 0x03},
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{0x698B, 0x03},
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@ -405,12 +405,12 @@ static const struct reg_8 imx274_start_2[] = {
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*/
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static const struct reg_8 imx274_start_3[] = {
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{0x30F4, 0x00},
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{0x3018, 0xA2}, /* XHS VHS OUTUPT */
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{0x3018, 0xA2}, /* XHS VHS OUTPUT */
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{IMX274_TABLE_END, 0x00}
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};
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/*
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* imx274 register configuration for stoping stream
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* imx274 register configuration for stopping stream
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*/
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static const struct reg_8 imx274_stop[] = {
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{IMX274_STANDBY_REG, 0x01},
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@ -55,7 +55,7 @@ enum led_enable {
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* @regmap: reg. map for i2c
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* @lock: muxtex for serial access.
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* @led_mode: V4L2 LED mode
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* @ctrls_led: V4L2 contols
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* @ctrls_led: V4L2 controls
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* @subdev_led: V4L2 subdev
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*/
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struct lm3560_flash {
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@ -62,7 +62,7 @@ enum led_mode {
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* @regmap: reg. map for i2c
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* @lock: muxtex for serial access.
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* @led_mode: V4L2 LED mode
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* @ctrls_led: V4L2 contols
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* @ctrls_led: V4L2 controls
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* @subdev_led: V4L2 subdev
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* @mode_reg : mode register value
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*/
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@ -253,7 +253,7 @@ struct m5mols_info {
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*
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* The I2C read operation of the M-5MOLS requires 2 messages. The first
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* message sends the information about the command, command category, and total
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* message size. The second message is used to retrieve the data specifed in
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* message size. The second message is used to retrieve the data specified in
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* the first message
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*
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* 1st message 2nd message
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@ -291,7 +291,7 @@ int m5mols_write(struct v4l2_subdev *sd, u32 reg, u32 val)
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* @reg: the I2C_REG() address of an 8-bit status register to check
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* @value: expected status register value
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* @mask: bit mask for the read status register value
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* @timeout: timeout in miliseconds, or -1 for default timeout
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* @timeout: timeout in milliseconds, or -1 for default timeout
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*
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* The @reg register value is ORed with @mask before comparing with @value.
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*
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@ -11,7 +11,7 @@
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*
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* FM-Mono
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* should work. The stereo modes are backward compatible to FM-mono,
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* therefore FM-Mono should be allways available.
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* therefore FM-Mono should be always available.
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*
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* FM-Stereo (B/G, used in germany)
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* should work, with autodetect
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@ -541,7 +541,7 @@ static int mt9t112_init_setting(const struct i2c_client *client)
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mt9t112_mcu_write(ret, client, VAR(18, 109), 0x0AF0);
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/*
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* Flicker Dectection registers.
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* Flicker Detection registers.
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* This section should be replaced whenever new timing file is
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* generated. All the following registers need to be replaced.
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* Following registers are generated from Register Wizard but user can
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@ -721,7 +721,7 @@ static int ov5640_mod_reg(struct ov5640_dev *sensor, u16 reg,
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/*
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* After trying the various combinations, reading various
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* documentations spreaded around the net, and from the various
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* documentations spread around the net, and from the various
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* feedback, the clock tree is probably as follows:
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*
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* +--------------+
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@ -15,7 +15,7 @@
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* Copyright (C) 2008 Magnus Damm
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* Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de>
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*
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* Hardware specific bits initialy based on former work by Matt Callow
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* Hardware specific bits initially based on former work by Matt Callow
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* drivers/media/video/omap/sensor_ov6650.c
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* Copyright (C) 2006 Matt Callow
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*
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@ -759,7 +759,7 @@ static int ov6650_s_frame_interval(struct v4l2_subdev *sd,
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/*
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* Keep result to be used as tpf limit
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* for subseqent clock divider calculations
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* for subsequent clock divider calculations
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*/
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priv->tpf.numerator = div;
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priv->tpf.denominator = FRAME_RATE_MAX;
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@ -20,7 +20,7 @@
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#define REG_BGAIN 0x01 /* blue gain */
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#define REG_RGAIN 0x02 /* red gain */
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#define REG_GGAIN 0x03 /* green gain */
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#define REG_REG04 0x04 /* analog setting, dont change*/
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#define REG_REG04 0x04 /* analog setting, don't change*/
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#define REG_BAVG 0x05 /* b channel average */
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#define REG_GAVG 0x06 /* g channel average */
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#define REG_RAVG 0x07 /* r channel average */
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* OV9650/OV9652 register definitions
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*/
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#define REG_GAIN 0x00 /* Gain control, AGC[7:0] */
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#define REG_BLUE 0x01 /* AWB - Blue chanel gain */
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#define REG_RED 0x02 /* AWB - Red chanel gain */
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#define REG_BLUE 0x01 /* AWB - Blue channel gain */
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#define REG_RED 0x02 /* AWB - Red channel gain */
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#define REG_VREF 0x03 /* [7:6] - AGC[9:8], [5:3]/[2:0] */
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#define VREF_GAIN_MASK 0xc0 /* - VREF end/start low 3 bits */
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#define REG_COM1 0x04
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@ -1431,7 +1431,7 @@ err:
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for (++i; i < S5C73M3_MAX_SUPPLIES; i++) {
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int r = regulator_enable(state->supplies[i].consumer);
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if (r < 0)
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v4l2_err(&state->oif_sd, "Failed to reenable %s: %d\n",
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v4l2_err(&state->oif_sd, "Failed to re-enable %s: %d\n",
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state->supplies[i].supply, r);
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}
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@ -729,7 +729,7 @@ static int s5k6aa_new_config_sync(struct i2c_client *client, int timeout,
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* @s5k6aa: pointer to &struct s5k6aa describing the device
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* @preset: s5kaa preset to be applied
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*
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* Configure output resolution and color fromat, pixel clock
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* Configure output resolution and color format, pixel clock
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* frequency range, device frame rate type and frame period range.
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*/
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static int s5k6aa_set_prev_config(struct s5k6aa *s5k6aa,
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@ -1766,7 +1766,7 @@ static int saa711x_detect_chip(struct i2c_client *client,
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* exists. However, tests on a device labeled as:
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* "GM7113C 1145" returned "10" on all 16 chip
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* version (reg 0x00) reads. So, we need to also
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* accept at least verion 0. For now, let's just
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* accept at least version 0. For now, let's just
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* assume that a device that returns "0000" for
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* the lower nibble is a gm7113c.
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*/
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@ -844,7 +844,7 @@ static void set_h_prescale(struct v4l2_subdev *sd,
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if (i == count)
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return;
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/* horizonal prescaling */
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/* horizontal prescaling */
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saa717x_write(sd, 0x60 + task_shift, vals[i].xpsc);
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/* accumulation length */
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saa717x_write(sd, 0x61 + task_shift, vals[i].xacl);
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@ -596,7 +596,7 @@
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#define RESET_AUDIO BIT(0) /* Reset Audio FIFO control */
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/* HDCP_BCAPS bits */
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#define HDCP_HDMI BIT(7) /* HDCP suports HDMI (vs DVI only) */
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#define HDCP_HDMI BIT(7) /* HDCP supports HDMI (vs DVI only) */
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#define HDCP_REPEATER BIT(6) /* HDCP supports repeater function */
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#define HDCP_READY BIT(5) /* set by repeater function */
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#define HDCP_FAST BIT(4) /* Up to 400kHz */
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@ -7,7 +7,7 @@
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The tda9840 is a stereo/dual sound processor with digital
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identification. It can be found at address 0x84 on the i2c-bus.
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For detailed informations download the specifications directly
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For detailed information download the specifications directly
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from SGS Thomson at http://www.st.com
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This program is free software; you can redistribute it and/or modify
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@ -9,7 +9,7 @@
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It is cascadable, i.e. it can be found at the addresses
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0x86 and 0x06 on the i2c-bus.
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For detailed informations download the specifications directly
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For detailed information download the specifications directly
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from SGS Thomson at http://www.st.com
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This program is free software; you can redistribute it and/or modify
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@ -9,7 +9,7 @@
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It is cascadable, i.e. it can be found at the addresses 0x98
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and 0x9a on the i2c-bus.
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For detailed informations download the specifications directly
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For detailed information download the specifications directly
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from SGS Thomson at http://www.st.com
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This program is free software; you can redistribute it and/or modify
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@ -538,7 +538,7 @@ static int tda9840_checkit(struct CHIPSTATE *chip)
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#define TDA9855_INT 0 /* Selects inputs LOR and LOL. (internal) */
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/* Unique to TDA9850: */
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/* lower 4 bits contol SAP noise threshold, over which SAP turns off
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/* lower 4 bits control SAP noise threshold, over which SAP turns off
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* set to values of 0x00 through 0x0f for SAP1 through SAP16 */
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@ -546,7 +546,7 @@ static int tda9840_checkit(struct CHIPSTATE *chip)
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/* Common to TDA9855 and TDA9850: */
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#define TDA985x_SAP 3<<6 /* Selects SAP output, mute if not received */
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#define TDA985x_MONOSAP 2<<6 /* Selects Mono on left, SAP on right */
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#define TDA985x_STEREO 1<<6 /* Selects Stereo ouput, mono if not received */
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#define TDA985x_STEREO 1<<6 /* Selects Stereo output, mono if not received */
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#define TDA985x_MONO 0 /* Forces Mono output */
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#define TDA985x_LMU 1<<3 /* Mute (LOR/LOL for 9855, OUTL/OUTR for 9850) */
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@ -67,7 +67,7 @@ enum tvp514x_std {
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};
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/**
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* struct tvp514x_std_info - Structure to store standard informations
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* struct tvp514x_std_info - Structure to store standard information
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* @width: Line width in pixels
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* @height:Number of active lines
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* @video_std: Value to write in REG_VIDEO_STD register
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