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drm/amdgpu: updated ta ucode header
added definition for ta_firmware_header_v2_0 Reviewed-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: John Clements <john.clements@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -124,6 +124,29 @@ struct ta_firmware_header_v1_0 {
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uint32_t ta_dtm_size_bytes;
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};
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enum ta_fw_type {
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TA_FW_TYPE_UNKOWN,
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TA_FW_TYPE_PSP_ASD,
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TA_FW_TYPE_PSP_XGMI,
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TA_FW_TYPE_PSP_RAS,
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TA_FW_TYPE_PSP_HDCP,
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TA_FW_TYPE_PSP_DTM,
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};
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struct ta_fw_bin_desc {
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uint32_t fw_type;
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uint32_t fw_version;
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uint32_t offset_bytes;
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uint32_t size_bytes;
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};
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/* version_major=2, version_minor=0 */
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struct ta_firmware_header_v2_0 {
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struct common_firmware_header header;
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uint32_t ta_fw_bin_count;
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struct ta_fw_bin_desc ta_fw_bin[];
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};
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/* version_major=1, version_minor=0 */
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struct gfx_firmware_header_v1_0 {
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struct common_firmware_header header;
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@ -276,6 +299,7 @@ union amdgpu_firmware_header {
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struct psp_firmware_header_v1_1 psp_v1_1;
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struct psp_firmware_header_v1_3 psp_v1_3;
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struct ta_firmware_header_v1_0 ta;
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struct ta_firmware_header_v2_0 ta_v2_0;
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struct gfx_firmware_header_v1_0 gfx;
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struct rlc_firmware_header_v1_0 rlc;
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struct rlc_firmware_header_v2_0 rlc_v2_0;
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@ -288,6 +312,8 @@ union amdgpu_firmware_header {
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uint8_t raw[0x100];
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};
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#define UCODE_MAX_TA_PACKAGING ((sizeof(union amdgpu_firmware_header) - sizeof(struct common_firmware_header) - 4) / sizeof(struct ta_fw_bin_desc))
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/*
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* fw loading support
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*/
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