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clean up reading of ICR register in FEC driver
On the MCF5272, there is no need to read the ICR before writing it : the bit 4n+3 is a write-enable for the bits 4n,4n+1 and 4n+2. Signed-off-by: Philippe De Muyter <phdm@macqel.be> Signed-off-by: Greg Ungerer <gerg@uclinux.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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@ -1270,7 +1270,7 @@ static void __inline__ fec_request_intrs(struct net_device *dev)
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icrp = (volatile unsigned long *) (MCF_MBAR + MCFSIM_ICR3);
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*icrp = 0x00000ddd;
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icrp = (volatile unsigned long *) (MCF_MBAR + MCFSIM_ICR1);
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*icrp = (*icrp & 0x70777777) | 0x0d000000;
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*icrp = 0x0d000000;
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}
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static void __inline__ fec_set_mii(struct net_device *dev, struct fec_enet_private *fep)
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@ -1332,7 +1332,7 @@ static void __inline__ fec_disable_phy_intr(void)
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{
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volatile unsigned long *icrp;
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icrp = (volatile unsigned long *) (MCF_MBAR + MCFSIM_ICR1);
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*icrp = (*icrp & 0x70777777) | 0x08000000;
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*icrp = 0x08000000;
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}
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static void __inline__ fec_phy_ack_intr(void)
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@ -1340,7 +1340,7 @@ static void __inline__ fec_phy_ack_intr(void)
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volatile unsigned long *icrp;
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/* Acknowledge the interrupt */
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icrp = (volatile unsigned long *) (MCF_MBAR + MCFSIM_ICR1);
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*icrp = (*icrp & 0x77777777) | 0x08000000;
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*icrp = 0x0d000000;
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}
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static void __inline__ fec_localhw_setup(void)
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