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drm/nouveau/kms/nv50-: use NVIDIA's headers for core head_dither()

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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
This commit is contained in:
Ben Skeggs 2020-06-21 12:35:48 +10:00
parent 35cefc538b
commit f801efb127
6 changed files with 42 additions and 22 deletions
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6
drivers/gpu/drm/nouveau/dispnv50/head.c
View File

@ -106,9 +106,9 @@ nv50_head_atomic_check_dither(struct nv50_head_atom *armh,
}
}
asyh->dither.enable = mode;
asyh->dither.bits = mode >> 1;
asyh->dither.mode = mode >> 3;
asyh->dither.enable = NVVAL_GET(mode, NV507D, HEAD_SET_DITHER_CONTROL, ENABLE);
asyh->dither.bits = NVVAL_GET(mode, NV507D, HEAD_SET_DITHER_CONTROL, BITS);
asyh->dither.mode = NVVAL_GET(mode, NV507D, HEAD_SET_DITHER_CONTROL, MODE);
asyh->set.dither = true;
}

8
drivers/gpu/drm/nouveau/dispnv50/head507d.c
View File

@ -51,9 +51,11 @@ head507d_dither(struct nv50_head *head, struct nv50_head_atom *asyh)
if ((ret = PUSH_WAIT(push, 2)))
return ret;
PUSH_NVSQ(push, NV507D, 0x08a0 + (i * 0x400), asyh->dither.mode << 3 |
asyh->dither.bits << 1 |
asyh->dither.enable);
PUSH_MTHD(push, NV507D, HEAD_SET_DITHER_CONTROL(i),
NVVAL(NV507D, HEAD_SET_DITHER_CONTROL, ENABLE, asyh->dither.enable) |
NVVAL(NV507D, HEAD_SET_DITHER_CONTROL, BITS, asyh->dither.bits) |
NVVAL(NV507D, HEAD_SET_DITHER_CONTROL, MODE, asyh->dither.mode) |
NVVAL(NV507D, HEAD_SET_DITHER_CONTROL, PHASE, 0));
return 0;
}

8
drivers/gpu/drm/nouveau/dispnv50/head907d.c
View File

@ -78,9 +78,11 @@ head907d_dither(struct nv50_head *head, struct nv50_head_atom *asyh)
if ((ret = PUSH_WAIT(push, 2)))
return ret;
PUSH_NVSQ(push, NV907D, 0x0490 + (i * 0x300), asyh->dither.mode << 3 |
asyh->dither.bits << 1 |
asyh->dither.enable);
PUSH_MTHD(push, NV907D, HEAD_SET_DITHER_CONTROL(i),
NVVAL(NV907D, HEAD_SET_DITHER_CONTROL, ENABLE, asyh->dither.enable) |
NVVAL(NV907D, HEAD_SET_DITHER_CONTROL, BITS, asyh->dither.bits) |
NVVAL(NV907D, HEAD_SET_DITHER_CONTROL, MODE, asyh->dither.mode) |
NVVAL(NV907D, HEAD_SET_DITHER_CONTROL, PHASE, 0));
return 0;
}

8
drivers/gpu/drm/nouveau/dispnv50/head917d.c
View File

@ -36,9 +36,11 @@ head917d_dither(struct nv50_head *head, struct nv50_head_atom *asyh)
if ((ret = PUSH_WAIT(push, 2)))
return ret;
PUSH_NVSQ(push, NV917D, 0x04a0 + (i * 0x300), asyh->dither.mode << 3 |
asyh->dither.bits << 1 |
asyh->dither.enable);
PUSH_MTHD(push, NV917D, HEAD_SET_DITHER_CONTROL(i),
NVVAL(NV917D, HEAD_SET_DITHER_CONTROL, ENABLE, asyh->dither.enable) |
NVVAL(NV917D, HEAD_SET_DITHER_CONTROL, BITS, asyh->dither.bits) |
NVVAL(NV917D, HEAD_SET_DITHER_CONTROL, MODE, asyh->dither.mode) |
NVVAL(NV917D, HEAD_SET_DITHER_CONTROL, PHASE, 0));
return 0;
}

9
drivers/gpu/drm/nouveau/dispnv50/headc37d.c
View File

@ -85,9 +85,12 @@ headc37d_dither(struct nv50_head *head, struct nv50_head_atom *asyh)
if ((ret = PUSH_WAIT(push, 2)))
return ret;
PUSH_NVSQ(push, NV907D, 0x2018 + (i * 0x400), asyh->dither.mode << 8 |
asyh->dither.bits << 4 |
asyh->dither.enable);
PUSH_MTHD(push, NVC37D, HEAD_SET_DITHER_CONTROL(i),
NVVAL(NVC37D, HEAD_SET_DITHER_CONTROL, ENABLE, asyh->dither.enable) |
NVVAL(NVC37D, HEAD_SET_DITHER_CONTROL, BITS, asyh->dither.bits) |
NVDEF(NVC37D, HEAD_SET_DITHER_CONTROL, OFFSET_ENABLE, DISABLE) |
NVVAL(NVC37D, HEAD_SET_DITHER_CONTROL, MODE, asyh->dither.mode) |
NVVAL(NVC37D, HEAD_SET_DITHER_CONTROL, PHASE, 0));
return 0;
}

25
drivers/gpu/drm/nouveau/nouveau_connector.h
View File

@ -29,6 +29,10 @@
#include <nvif/notify.h>
#include <nvhw/class/cl507d.h>
#include <nvhw/class/cl907d.h>
#include <nvhw/drf.h>
#include <drm/drm_crtc.h>
#include <drm/drm_edid.h>
#include <drm/drm_encoder.h>
@ -56,16 +60,23 @@ struct nouveau_conn_atom {
* hw values, and the code relies on this.
*/
enum {
DITHERING_MODE_OFF = 0x00,
DITHERING_MODE_ON = 0x01,
DITHERING_MODE_DYNAMIC2X2 = 0x10 | DITHERING_MODE_ON,
DITHERING_MODE_STATIC2X2 = 0x18 | DITHERING_MODE_ON,
DITHERING_MODE_TEMPORAL = 0x20 | DITHERING_MODE_ON,
DITHERING_MODE_OFF =
NVDEF(NV507D, HEAD_SET_DITHER_CONTROL, ENABLE, DISABLE),
DITHERING_MODE_ON =
NVDEF(NV507D, HEAD_SET_DITHER_CONTROL, ENABLE, ENABLE),
DITHERING_MODE_DYNAMIC2X2 = DITHERING_MODE_ON |
NVDEF(NV507D, HEAD_SET_DITHER_CONTROL, MODE, DYNAMIC_2X2),
DITHERING_MODE_STATIC2X2 = DITHERING_MODE_ON |
NVDEF(NV507D, HEAD_SET_DITHER_CONTROL, MODE, STATIC_2X2),
DITHERING_MODE_TEMPORAL = DITHERING_MODE_ON |
NVDEF(NV907D, HEAD_SET_DITHER_CONTROL, MODE, TEMPORAL),
DITHERING_MODE_AUTO
} mode;
enum {
DITHERING_DEPTH_6BPC = 0x00,
DITHERING_DEPTH_8BPC = 0x02,
DITHERING_DEPTH_6BPC =
NVDEF(NV507D, HEAD_SET_DITHER_CONTROL, BITS, DITHER_TO_6_BITS),
DITHERING_DEPTH_8BPC =
NVDEF(NV507D, HEAD_SET_DITHER_CONTROL, BITS, DITHER_TO_8_BITS),
DITHERING_DEPTH_AUTO
} depth;
} dither;