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drm/exynos: Fix fb_videomode <-> drm_mode_modeinfo conversion
The fb_videomode structure stores the front porch and back porch in the right_margin and left_margin fields respectively. right_margin should thus be computed with hsync_start - hdisplay, and left_margin with htotal - hsync_end. The same holds for the vertical direction. Active Front Sync Back Region Porch Porch <-------------------><----------------><-------------><----------------> //////////////////| ////////////////// | ////////////////// |.................. .................. _______________ <------ xres -------><- right_margin -><- hsync_len -><- left_margin --> <---- hdisplay -----> <------------ hsync_start ------------> <--------------------- hsync_end --------------------> <--------------------------------- htotal -----------------------------> Fix the fb_videomode <-> drm_mode_modeinfo conversion functions accordingly. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Joonyoung Shim <jy0922.shim@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
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@ -54,14 +54,14 @@ convert_to_display_mode(struct drm_display_mode *mode,
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mode->vrefresh = timing->refresh;
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mode->hdisplay = timing->xres;
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mode->hsync_start = mode->hdisplay + timing->left_margin;
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mode->hsync_start = mode->hdisplay + timing->right_margin;
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mode->hsync_end = mode->hsync_start + timing->hsync_len;
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mode->htotal = mode->hsync_end + timing->right_margin;
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mode->htotal = mode->hsync_end + timing->left_margin;
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mode->vdisplay = timing->yres;
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mode->vsync_start = mode->vdisplay + timing->upper_margin;
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mode->vsync_start = mode->vdisplay + timing->lower_margin;
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mode->vsync_end = mode->vsync_start + timing->vsync_len;
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mode->vtotal = mode->vsync_end + timing->lower_margin;
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mode->vtotal = mode->vsync_end + timing->upper_margin;
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mode->width_mm = panel->width_mm;
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mode->height_mm = panel->height_mm;
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@ -85,14 +85,14 @@ convert_to_video_timing(struct fb_videomode *timing,
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timing->refresh = drm_mode_vrefresh(mode);
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timing->xres = mode->hdisplay;
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timing->left_margin = mode->hsync_start - mode->hdisplay;
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timing->right_margin = mode->hsync_start - mode->hdisplay;
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timing->hsync_len = mode->hsync_end - mode->hsync_start;
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timing->right_margin = mode->htotal - mode->hsync_end;
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timing->left_margin = mode->htotal - mode->hsync_end;
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timing->yres = mode->vdisplay;
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timing->upper_margin = mode->vsync_start - mode->vdisplay;
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timing->lower_margin = mode->vsync_start - mode->vdisplay;
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timing->vsync_len = mode->vsync_end - mode->vsync_start;
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timing->lower_margin = mode->vtotal - mode->vsync_end;
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timing->upper_margin = mode->vtotal - mode->vsync_end;
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if (mode->flags & DRM_MODE_FLAG_INTERLACE)
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timing->vmode = FB_VMODE_INTERLACED;
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