Merge master.kernel.org:/home/rmk/linux-2.6-arm

* master.kernel.org:/home/rmk/linux-2.6-arm:
  [ARM] 4445/1: ANUBIS: Fix CPLD registers
  [ARM] 4444/2: OSIRIS: CPLD suspend fix
  [ARM] 4443/1: OSIRIS: Add watchdog device to machine devices
  [ARM] 4442/1: OSIRIS: Fix CPLD register definitions
  [ARM] VFP: fix section mismatch error
This commit is contained in:
Linus Torvalds 2007-06-14 15:06:49 -07:00
commit f701737deb
9 changed files with 97 additions and 30 deletions

View File

@ -76,8 +76,8 @@ static struct map_desc anubis_iodesc[] __initdata = {
.length = SZ_4K, .length = SZ_4K,
.type = MT_DEVICE, .type = MT_DEVICE,
}, { }, {
.virtual = (u32)ANUBIS_VA_CTRL2, .virtual = (u32)ANUBIS_VA_IDREG,
.pfn = __phys_to_pfn(ANUBIS_PA_CTRL2), .pfn = __phys_to_pfn(ANUBIS_PA_IDREG),
.length = SZ_4K, .length = SZ_4K,
.type = MT_DEVICE, .type = MT_DEVICE,
}, },

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@ -16,6 +16,7 @@
#include <linux/timer.h> #include <linux/timer.h>
#include <linux/init.h> #include <linux/init.h>
#include <linux/device.h> #include <linux/device.h>
#include <linux/sysdev.h>
#include <linux/serial_core.h> #include <linux/serial_core.h>
#include <asm/mach/arch.h> #include <asm/mach/arch.h>
@ -65,6 +66,11 @@ static struct map_desc osiris_iodesc[] __initdata = {
/* CPLD control registers */ /* CPLD control registers */
{ {
.virtual = (u32)OSIRIS_VA_CTRL0,
.pfn = __phys_to_pfn(OSIRIS_PA_CTRL0),
.length = SZ_16K,
.type = MT_DEVICE,
}, {
.virtual = (u32)OSIRIS_VA_CTRL1, .virtual = (u32)OSIRIS_VA_CTRL1,
.pfn = __phys_to_pfn(OSIRIS_PA_CTRL1), .pfn = __phys_to_pfn(OSIRIS_PA_CTRL1),
.length = SZ_16K, .length = SZ_16K,
@ -74,6 +80,11 @@ static struct map_desc osiris_iodesc[] __initdata = {
.pfn = __phys_to_pfn(OSIRIS_PA_CTRL2), .pfn = __phys_to_pfn(OSIRIS_PA_CTRL2),
.length = SZ_16K, .length = SZ_16K,
.type = MT_DEVICE, .type = MT_DEVICE,
}, {
.virtual = (u32)OSIRIS_VA_IDREG,
.pfn = __phys_to_pfn(OSIRIS_PA_IDREG),
.length = SZ_16K,
.type = MT_DEVICE,
}, },
}; };
@ -195,13 +206,13 @@ static void osiris_nand_select(struct s3c2410_nand_set *set, int slot)
pr_debug("osiris_nand: selecting slot %d (set %p,%p)\n", pr_debug("osiris_nand: selecting slot %d (set %p,%p)\n",
slot, set, set->nr_map); slot, set, set->nr_map);
tmp = __raw_readb(OSIRIS_VA_CTRL1); tmp = __raw_readb(OSIRIS_VA_CTRL0);
tmp &= ~OSIRIS_CTRL1_NANDSEL; tmp &= ~OSIRIS_CTRL0_NANDSEL;
tmp |= slot; tmp |= slot;
pr_debug("osiris_nand: ctrl1 now %02x\n", tmp); pr_debug("osiris_nand: ctrl0 now %02x\n", tmp);
__raw_writeb(tmp, OSIRIS_VA_CTRL1); __raw_writeb(tmp, OSIRIS_VA_CTRL0);
} }
static struct s3c2410_platform_nand osiris_nand_info = { static struct s3c2410_platform_nand osiris_nand_info = {
@ -235,10 +246,45 @@ static struct platform_device osiris_pcmcia = {
.resource = osiris_pcmcia_resource, .resource = osiris_pcmcia_resource,
}; };
/* Osiris power management device */
#ifdef CONFIG_PM
static unsigned char pm_osiris_ctrl0;
static int osiris_pm_suspend(struct sys_device *sd, pm_message_t state)
{
pm_osiris_ctrl0 = __raw_readb(OSIRIS_VA_CTRL0);
return 0;
}
static int osiris_pm_resume(struct sys_device *sd)
{
if (pm_osiris_ctrl0 & OSIRIS_CTRL0_FIX8)
__raw_writeb(OSIRIS_CTRL1_FIX8, OSIRIS_VA_CTRL1);
return 0;
}
#else
#define osiris_pm_suspend NULL
#define osiris_pm_resume NULL
#endif
static struct sysdev_class osiris_pm_sysclass = {
set_kset_name("mach-osiris"),
.suspend = osiris_pm_suspend,
.resume = osiris_pm_resume,
};
static struct sys_device osiris_pm_sysdev = {
.cls = &osiris_pm_sysclass,
};
/* Standard Osiris devices */ /* Standard Osiris devices */
static struct platform_device *osiris_devices[] __initdata = { static struct platform_device *osiris_devices[] __initdata = {
&s3c_device_i2c, &s3c_device_i2c,
&s3c_device_wdt,
&s3c_device_nand, &s3c_device_nand,
&osiris_pcmcia, &osiris_pcmcia,
}; };
@ -288,6 +334,9 @@ static void __init osiris_map_io(void)
static void __init osiris_init(void) static void __init osiris_init(void)
{ {
sysdev_class_register(&osiris_pm_sysclass);
sysdev_register(&osiris_pm_sysdev);
platform_add_devices(osiris_devices, ARRAY_SIZE(osiris_devices)); platform_add_devices(osiris_devices, ARRAY_SIZE(osiris_devices));
}; };
@ -299,5 +348,6 @@ MACHINE_START(OSIRIS, "Simtec-OSIRIS")
.map_io = osiris_map_io, .map_io = osiris_map_io,
.init_machine = osiris_init, .init_machine = osiris_init,
.init_irq = s3c24xx_init_irq, .init_irq = s3c24xx_init_irq,
.init_machine = osiris_init,
.timer = &s3c24xx_timer, .timer = &s3c24xx_timer,
MACHINE_END MACHINE_END

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@ -29,6 +29,10 @@ do_vfp:
add r10, r10, #TI_VFPSTATE @ r10 = workspace add r10, r10, #TI_VFPSTATE @ r10 = workspace
ldr pc, [r4] @ call VFP entry point ldr pc, [r4] @ call VFP entry point
ENTRY(vfp_null_entry)
mov pc, lr
ENDPROC(vfp_null_entry)
.LCvfp: .LCvfp:
.word vfp_vector .word vfp_vector

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@ -26,8 +26,9 @@
*/ */
void vfp_testing_entry(void); void vfp_testing_entry(void);
void vfp_support_entry(void); void vfp_support_entry(void);
void vfp_null_entry(void);
void (*vfp_vector)(void) = vfp_testing_entry; void (*vfp_vector)(void) = vfp_null_entry;
union vfp_state *last_VFP_context[NR_CPUS]; union vfp_state *last_VFP_context[NR_CPUS];
/* /*
@ -321,8 +322,10 @@ static int __init vfp_init(void)
* The handler is already setup to just log calls, so * The handler is already setup to just log calls, so
* we just need to read the VFPSID register. * we just need to read the VFPSID register.
*/ */
vfp_vector = vfp_testing_entry;
vfpsid = fmrx(FPSID); vfpsid = fmrx(FPSID);
barrier(); barrier();
vfp_vector = vfp_null_entry;
printk(KERN_INFO "VFP support v0.3: "); printk(KERN_INFO "VFP support v0.3: ");
if (VFP_arch) { if (VFP_arch) {

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@ -18,4 +18,8 @@
#define ANUBIS_CTRL1_NANDSEL (0x3) #define ANUBIS_CTRL1_NANDSEL (0x3)
/* IDREG - revision */
#define ANUBIS_IDREG_REVMASK (0x7)
#endif /* __ASM_ARCH_ANUBISCPLD_H */ #endif /* __ASM_ARCH_ANUBISCPLD_H */

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@ -27,14 +27,8 @@
#define ANUBIS_VA_CTRL1 ANUBIS_IOADDR(0x00000000) /* 0x01800000 */ #define ANUBIS_VA_CTRL1 ANUBIS_IOADDR(0x00000000) /* 0x01800000 */
#define ANUBIS_PA_CTRL1 (ANUBIS_PA_CPLD) #define ANUBIS_PA_CTRL1 (ANUBIS_PA_CPLD)
#define ANUBIS_VA_CTRL2 ANUBIS_IOADDR(0x00100000) /* 0x01900000 */ #define ANUBIS_VA_IDREG ANUBIS_IOADDR(0x00300000) /* 0x01B00000 */
#define ANUBIS_PA_CTRL2 (ANUBIS_PA_CPLD) #define ANUBIS_PA_IDREG (ANUBIS_PA_CPLD + (3<<23))
#define ANUBIS_VA_CTRL3 ANUBIS_IOADDR(0x00200000) /* 0x01A00000 */
#define ANUBIS_PA_CTRL3 (ANUBIS_PA_CPLD)
#define ANUBIS_VA_CTRL4 ANUBIS_IOADDR(0x00300000) /* 0x01B00000 */
#define ANUBIS_PA_CTRL4 (ANUBIS_PA_CPLD)
#define ANUBIS_IDEPRI ANUBIS_IOADDR(0x01000000) #define ANUBIS_IDEPRI ANUBIS_IOADDR(0x01000000)
#define ANUBIS_IDEPRIAUX ANUBIS_IOADDR(0x01100000) #define ANUBIS_IDEPRIAUX ANUBIS_IOADDR(0x01100000)

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@ -1,6 +1,6 @@
/* linux/include/asm-arm/arch-s3c2410/osiris-cpld.h /* linux/include/asm-arm/arch-s3c2410/osiris-cpld.h
* *
* Copyright (c) 2005 Simtec Electronics * Copyright 2005 Simtec Electronics
* http://www.simtec.co.uk/products/ * http://www.simtec.co.uk/products/
* Ben Dooks <ben@simtec.co.uk> * Ben Dooks <ben@simtec.co.uk>
* *
@ -14,12 +14,17 @@
#ifndef __ASM_ARCH_OSIRISCPLD_H #ifndef __ASM_ARCH_OSIRISCPLD_H
#define __ASM_ARCH_OSIRISCPLD_H #define __ASM_ARCH_OSIRISCPLD_H
/* CTRL1 - NAND WP control */ /* CTRL0 - NAND WP control */
#define OSIRIS_CTRL1_NANDSEL (0x3) #define OSIRIS_CTRL0_NANDSEL (0x3)
#define OSIRIS_CTRL1_BOOT_INT (1<<3) #define OSIRIS_CTRL0_BOOT_INT (1<<3)
#define OSIRIS_CTRL1_PCMCIA (1<<4) #define OSIRIS_CTRL0_PCMCIA (1<<4)
#define OSIRIS_CTRL1_PCMCIA_nWAIT (1<<6) #define OSIRIS_CTRL0_FIX8 (1<<5)
#define OSIRIS_CTRL1_PCMCIA_nIOIS16 (1<<7) #define OSIRIS_CTRL0_PCMCIA_nWAIT (1<<6)
#define OSIRIS_CTRL0_PCMCIA_nIOIS16 (1<<7)
#define OSIRIS_CTRL1_FIX8 (1<<0)
#define OSIRIS_ID_REVMASK (0x7)
#endif /* __ASM_ARCH_OSIRISCPLD_H */ #endif /* __ASM_ARCH_OSIRISCPLD_H */

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@ -24,16 +24,19 @@
/* we put the CPLD registers next, to get them out of the way */ /* we put the CPLD registers next, to get them out of the way */
#define OSIRIS_VA_CTRL1 OSIRIS_IOADDR(0x00000000) #define OSIRIS_VA_CTRL0 OSIRIS_IOADDR(0x00000000)
#define OSIRIS_PA_CTRL1 (OSIRIS_PA_CPLD) #define OSIRIS_PA_CTRL0 (OSIRIS_PA_CPLD)
#define OSIRIS_VA_CTRL2 OSIRIS_IOADDR(0x00100000) #define OSIRIS_VA_CTRL1 OSIRIS_IOADDR(0x00100000)
#define OSIRIS_PA_CTRL2 (OSIRIS_PA_CPLD + (1<<23)) #define OSIRIS_PA_CTRL1 (OSIRIS_PA_CPLD + (1<<23))
#define OSIRIS_VA_CTRL3 OSIRIS_IOADDR(0x00200000) #define OSIRIS_VA_CTRL2 OSIRIS_IOADDR(0x00200000)
#define OSIRIS_PA_CTRL3 (OSIRIS_PA_CPLD + (2<<23)) #define OSIRIS_PA_CTRL2 (OSIRIS_PA_CPLD + (2<<23))
#define OSIRIS_VA_CTRL4 OSIRIS_IOADDR(0x00300000) #define OSIRIS_VA_CTRL3 OSIRIS_IOADDR(0x00300000)
#define OSIRIS_PA_CTRL4 (OSIRIS_PA_CPLD + (3<<23)) #define OSIRIS_PA_CTRL3 (OSIRIS_PA_CPLD + (2<<23))
#define OSIRIS_VA_IDREG OSIRIS_IOADDR(0x00700000)
#define OSIRIS_PA_IDREG (OSIRIS_PA_CPLD + (7<<23))
#endif /* __ASM_ARCH_OSIRISMAP_H */ #endif /* __ASM_ARCH_OSIRISMAP_H */

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@ -4,4 +4,8 @@
#define __ALIGN .align 0 #define __ALIGN .align 0
#define __ALIGN_STR ".align 0" #define __ALIGN_STR ".align 0"
#define ENDPROC(name) \
.type name, %function; \
END(name)
#endif #endif