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Merge master.kernel.org:/home/rmk/linux-2.6-arm
* master.kernel.org:/home/rmk/linux-2.6-arm: [ARM] 4445/1: ANUBIS: Fix CPLD registers [ARM] 4444/2: OSIRIS: CPLD suspend fix [ARM] 4443/1: OSIRIS: Add watchdog device to machine devices [ARM] 4442/1: OSIRIS: Fix CPLD register definitions [ARM] VFP: fix section mismatch error
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commit
f701737deb
@ -76,8 +76,8 @@ static struct map_desc anubis_iodesc[] __initdata = {
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.length = SZ_4K,
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.type = MT_DEVICE,
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}, {
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.virtual = (u32)ANUBIS_VA_CTRL2,
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.pfn = __phys_to_pfn(ANUBIS_PA_CTRL2),
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.virtual = (u32)ANUBIS_VA_IDREG,
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.pfn = __phys_to_pfn(ANUBIS_PA_IDREG),
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.length = SZ_4K,
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.type = MT_DEVICE,
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},
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@ -16,6 +16,7 @@
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#include <linux/timer.h>
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#include <linux/init.h>
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#include <linux/device.h>
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#include <linux/sysdev.h>
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#include <linux/serial_core.h>
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#include <asm/mach/arch.h>
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@ -65,6 +66,11 @@ static struct map_desc osiris_iodesc[] __initdata = {
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/* CPLD control registers */
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{
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.virtual = (u32)OSIRIS_VA_CTRL0,
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.pfn = __phys_to_pfn(OSIRIS_PA_CTRL0),
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.length = SZ_16K,
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.type = MT_DEVICE,
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}, {
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.virtual = (u32)OSIRIS_VA_CTRL1,
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.pfn = __phys_to_pfn(OSIRIS_PA_CTRL1),
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.length = SZ_16K,
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@ -74,6 +80,11 @@ static struct map_desc osiris_iodesc[] __initdata = {
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.pfn = __phys_to_pfn(OSIRIS_PA_CTRL2),
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.length = SZ_16K,
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.type = MT_DEVICE,
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}, {
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.virtual = (u32)OSIRIS_VA_IDREG,
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.pfn = __phys_to_pfn(OSIRIS_PA_IDREG),
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.length = SZ_16K,
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.type = MT_DEVICE,
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},
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};
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@ -195,13 +206,13 @@ static void osiris_nand_select(struct s3c2410_nand_set *set, int slot)
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pr_debug("osiris_nand: selecting slot %d (set %p,%p)\n",
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slot, set, set->nr_map);
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tmp = __raw_readb(OSIRIS_VA_CTRL1);
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tmp &= ~OSIRIS_CTRL1_NANDSEL;
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tmp = __raw_readb(OSIRIS_VA_CTRL0);
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tmp &= ~OSIRIS_CTRL0_NANDSEL;
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tmp |= slot;
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pr_debug("osiris_nand: ctrl1 now %02x\n", tmp);
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pr_debug("osiris_nand: ctrl0 now %02x\n", tmp);
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__raw_writeb(tmp, OSIRIS_VA_CTRL1);
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__raw_writeb(tmp, OSIRIS_VA_CTRL0);
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}
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static struct s3c2410_platform_nand osiris_nand_info = {
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@ -235,10 +246,45 @@ static struct platform_device osiris_pcmcia = {
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.resource = osiris_pcmcia_resource,
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};
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/* Osiris power management device */
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#ifdef CONFIG_PM
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static unsigned char pm_osiris_ctrl0;
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static int osiris_pm_suspend(struct sys_device *sd, pm_message_t state)
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{
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pm_osiris_ctrl0 = __raw_readb(OSIRIS_VA_CTRL0);
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return 0;
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}
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static int osiris_pm_resume(struct sys_device *sd)
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{
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if (pm_osiris_ctrl0 & OSIRIS_CTRL0_FIX8)
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__raw_writeb(OSIRIS_CTRL1_FIX8, OSIRIS_VA_CTRL1);
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return 0;
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}
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#else
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#define osiris_pm_suspend NULL
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#define osiris_pm_resume NULL
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#endif
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static struct sysdev_class osiris_pm_sysclass = {
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set_kset_name("mach-osiris"),
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.suspend = osiris_pm_suspend,
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.resume = osiris_pm_resume,
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};
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static struct sys_device osiris_pm_sysdev = {
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.cls = &osiris_pm_sysclass,
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};
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/* Standard Osiris devices */
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static struct platform_device *osiris_devices[] __initdata = {
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&s3c_device_i2c,
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&s3c_device_wdt,
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&s3c_device_nand,
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&osiris_pcmcia,
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};
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@ -288,6 +334,9 @@ static void __init osiris_map_io(void)
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static void __init osiris_init(void)
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{
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sysdev_class_register(&osiris_pm_sysclass);
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sysdev_register(&osiris_pm_sysdev);
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platform_add_devices(osiris_devices, ARRAY_SIZE(osiris_devices));
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};
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@ -299,5 +348,6 @@ MACHINE_START(OSIRIS, "Simtec-OSIRIS")
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.map_io = osiris_map_io,
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.init_machine = osiris_init,
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.init_irq = s3c24xx_init_irq,
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.init_machine = osiris_init,
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.timer = &s3c24xx_timer,
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MACHINE_END
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@ -29,6 +29,10 @@ do_vfp:
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add r10, r10, #TI_VFPSTATE @ r10 = workspace
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ldr pc, [r4] @ call VFP entry point
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ENTRY(vfp_null_entry)
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mov pc, lr
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ENDPROC(vfp_null_entry)
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.LCvfp:
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.word vfp_vector
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@ -26,8 +26,9 @@
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*/
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void vfp_testing_entry(void);
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void vfp_support_entry(void);
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void vfp_null_entry(void);
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void (*vfp_vector)(void) = vfp_testing_entry;
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void (*vfp_vector)(void) = vfp_null_entry;
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union vfp_state *last_VFP_context[NR_CPUS];
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/*
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@ -321,8 +322,10 @@ static int __init vfp_init(void)
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* The handler is already setup to just log calls, so
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* we just need to read the VFPSID register.
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*/
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vfp_vector = vfp_testing_entry;
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vfpsid = fmrx(FPSID);
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barrier();
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vfp_vector = vfp_null_entry;
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printk(KERN_INFO "VFP support v0.3: ");
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if (VFP_arch) {
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@ -18,4 +18,8 @@
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#define ANUBIS_CTRL1_NANDSEL (0x3)
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/* IDREG - revision */
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#define ANUBIS_IDREG_REVMASK (0x7)
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#endif /* __ASM_ARCH_ANUBISCPLD_H */
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@ -27,14 +27,8 @@
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#define ANUBIS_VA_CTRL1 ANUBIS_IOADDR(0x00000000) /* 0x01800000 */
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#define ANUBIS_PA_CTRL1 (ANUBIS_PA_CPLD)
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#define ANUBIS_VA_CTRL2 ANUBIS_IOADDR(0x00100000) /* 0x01900000 */
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#define ANUBIS_PA_CTRL2 (ANUBIS_PA_CPLD)
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#define ANUBIS_VA_CTRL3 ANUBIS_IOADDR(0x00200000) /* 0x01A00000 */
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#define ANUBIS_PA_CTRL3 (ANUBIS_PA_CPLD)
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#define ANUBIS_VA_CTRL4 ANUBIS_IOADDR(0x00300000) /* 0x01B00000 */
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#define ANUBIS_PA_CTRL4 (ANUBIS_PA_CPLD)
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#define ANUBIS_VA_IDREG ANUBIS_IOADDR(0x00300000) /* 0x01B00000 */
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#define ANUBIS_PA_IDREG (ANUBIS_PA_CPLD + (3<<23))
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#define ANUBIS_IDEPRI ANUBIS_IOADDR(0x01000000)
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#define ANUBIS_IDEPRIAUX ANUBIS_IOADDR(0x01100000)
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@ -1,6 +1,6 @@
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/* linux/include/asm-arm/arch-s3c2410/osiris-cpld.h
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*
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* Copyright (c) 2005 Simtec Electronics
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* Copyright 2005 Simtec Electronics
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* http://www.simtec.co.uk/products/
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* Ben Dooks <ben@simtec.co.uk>
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*
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@ -14,12 +14,17 @@
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#ifndef __ASM_ARCH_OSIRISCPLD_H
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#define __ASM_ARCH_OSIRISCPLD_H
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/* CTRL1 - NAND WP control */
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/* CTRL0 - NAND WP control */
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#define OSIRIS_CTRL1_NANDSEL (0x3)
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#define OSIRIS_CTRL1_BOOT_INT (1<<3)
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#define OSIRIS_CTRL1_PCMCIA (1<<4)
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#define OSIRIS_CTRL1_PCMCIA_nWAIT (1<<6)
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#define OSIRIS_CTRL1_PCMCIA_nIOIS16 (1<<7)
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#define OSIRIS_CTRL0_NANDSEL (0x3)
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#define OSIRIS_CTRL0_BOOT_INT (1<<3)
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#define OSIRIS_CTRL0_PCMCIA (1<<4)
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#define OSIRIS_CTRL0_FIX8 (1<<5)
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#define OSIRIS_CTRL0_PCMCIA_nWAIT (1<<6)
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#define OSIRIS_CTRL0_PCMCIA_nIOIS16 (1<<7)
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#define OSIRIS_CTRL1_FIX8 (1<<0)
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#define OSIRIS_ID_REVMASK (0x7)
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#endif /* __ASM_ARCH_OSIRISCPLD_H */
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@ -24,16 +24,19 @@
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/* we put the CPLD registers next, to get them out of the way */
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#define OSIRIS_VA_CTRL1 OSIRIS_IOADDR(0x00000000)
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#define OSIRIS_PA_CTRL1 (OSIRIS_PA_CPLD)
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#define OSIRIS_VA_CTRL0 OSIRIS_IOADDR(0x00000000)
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#define OSIRIS_PA_CTRL0 (OSIRIS_PA_CPLD)
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#define OSIRIS_VA_CTRL2 OSIRIS_IOADDR(0x00100000)
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#define OSIRIS_PA_CTRL2 (OSIRIS_PA_CPLD + (1<<23))
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#define OSIRIS_VA_CTRL1 OSIRIS_IOADDR(0x00100000)
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#define OSIRIS_PA_CTRL1 (OSIRIS_PA_CPLD + (1<<23))
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#define OSIRIS_VA_CTRL3 OSIRIS_IOADDR(0x00200000)
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#define OSIRIS_PA_CTRL3 (OSIRIS_PA_CPLD + (2<<23))
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#define OSIRIS_VA_CTRL2 OSIRIS_IOADDR(0x00200000)
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#define OSIRIS_PA_CTRL2 (OSIRIS_PA_CPLD + (2<<23))
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#define OSIRIS_VA_CTRL4 OSIRIS_IOADDR(0x00300000)
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#define OSIRIS_PA_CTRL4 (OSIRIS_PA_CPLD + (3<<23))
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#define OSIRIS_VA_CTRL3 OSIRIS_IOADDR(0x00300000)
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#define OSIRIS_PA_CTRL3 (OSIRIS_PA_CPLD + (2<<23))
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#define OSIRIS_VA_IDREG OSIRIS_IOADDR(0x00700000)
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#define OSIRIS_PA_IDREG (OSIRIS_PA_CPLD + (7<<23))
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#endif /* __ASM_ARCH_OSIRISMAP_H */
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@ -4,4 +4,8 @@
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#define __ALIGN .align 0
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#define __ALIGN_STR ".align 0"
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#define ENDPROC(name) \
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.type name, %function; \
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END(name)
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#endif
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