mirror of
https://github.com/torvalds/linux.git
synced 2024-12-18 09:02:17 +00:00
Merge branch 'linux-3.19' of git://anongit.freedesktop.org/git/nouveau/linux-2.6 into drm-fixes
- Fix BUG() on !SMP builds
- Fix for OOPS on pre-NV50 that snuck into -next
- MCP7[789A] hang fix where firmware hasn't already setup NISO pollers
- NV4x IGP MSI disable, it doesn't appear to work correctly
- Add GK208B to recognised boards (no code change aside from adding
chipset recognition)
* 'linux-3.19' of git://anongit.freedesktop.org/git/nouveau/linux-2.6:
drm/nouveau/nouveau: Do not BUG_ON(!spin_is_locked()) on UP
drm/nv4c/mc: disable msi
drm/nouveau/fb/ram/mcp77: enable NISO poller
drm/nouveau/fb/ram/mcp77: use carveout reg to determine size
drm/nouveau/fb/ram/mcp77: subclass nouveau_ram
drm/nouveau: wake up the card if necessary during gem callbacks
drm/nouveau/device: Add support for GK208B, resolves bug 86935
drm/nouveau: fix missing return statement in nouveau_ttm_tt_unpopulate
drm/nouveau/bios: fix oops on pre-nv50 chipsets
This commit is contained in:
Dave Airlie
commit
f6624888a5
@ -26,7 +26,7 @@
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void
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nvkm_event_put(struct nvkm_event *event, u32 types, int index)
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{
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BUG_ON(!spin_is_locked(&event->refs_lock));
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assert_spin_locked(&event->refs_lock);
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while (types) {
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int type = __ffs(types); types &= ~(1 << type);
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if (--event->refs[index * event->types_nr + type] == 0) {
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@ -39,7 +39,7 @@ nvkm_event_put(struct nvkm_event *event, u32 types, int index)
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void
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nvkm_event_get(struct nvkm_event *event, u32 types, int index)
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{
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BUG_ON(!spin_is_locked(&event->refs_lock));
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assert_spin_locked(&event->refs_lock);
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while (types) {
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int type = __ffs(types); types &= ~(1 << type);
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if (++event->refs[index * event->types_nr + type] == 1) {
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@ -98,7 +98,7 @@ nvkm_notify_send(struct nvkm_notify *notify, void *data, u32 size)
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struct nvkm_event *event = notify->event;
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unsigned long flags;
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BUG_ON(!spin_is_locked(&event->list_lock));
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assert_spin_locked(&event->list_lock);
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BUG_ON(size != notify->size);
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spin_lock_irqsave(&event->refs_lock, flags);
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@ -249,6 +249,39 @@ nve0_identify(struct nouveau_device *device)
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device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass;
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device->oclass[NVDEV_ENGINE_PERFMON] = &nvf0_perfmon_oclass;
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break;
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case 0x106:
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device->cname = "GK208B";
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device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
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device->oclass[NVDEV_SUBDEV_GPIO ] = nve0_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_I2C ] = nve0_i2c_oclass;
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device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
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device->oclass[NVDEV_SUBDEV_CLOCK ] = &nve0_clock_oclass;
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device->oclass[NVDEV_SUBDEV_THERM ] = &nvd0_therm_oclass;
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device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
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device->oclass[NVDEV_SUBDEV_DEVINIT] = nvc0_devinit_oclass;
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device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass;
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device->oclass[NVDEV_SUBDEV_BUS ] = nvc0_bus_oclass;
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device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
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device->oclass[NVDEV_SUBDEV_FB ] = nve0_fb_oclass;
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device->oclass[NVDEV_SUBDEV_LTC ] = gk104_ltc_oclass;
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device->oclass[NVDEV_SUBDEV_IBUS ] = &nve0_ibus_oclass;
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device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass;
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device->oclass[NVDEV_SUBDEV_VM ] = &nvc0_vmmgr_oclass;
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device->oclass[NVDEV_SUBDEV_BAR ] = &nvc0_bar_oclass;
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device->oclass[NVDEV_SUBDEV_PWR ] = nv108_pwr_oclass;
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device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
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device->oclass[NVDEV_ENGINE_DMAOBJ ] = nvd0_dmaeng_oclass;
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device->oclass[NVDEV_ENGINE_FIFO ] = nv108_fifo_oclass;
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device->oclass[NVDEV_ENGINE_SW ] = nvc0_software_oclass;
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device->oclass[NVDEV_ENGINE_GR ] = nv108_graph_oclass;
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device->oclass[NVDEV_ENGINE_DISP ] = nvf0_disp_oclass;
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device->oclass[NVDEV_ENGINE_COPY0 ] = &nve0_copy0_oclass;
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device->oclass[NVDEV_ENGINE_COPY1 ] = &nve0_copy1_oclass;
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device->oclass[NVDEV_ENGINE_COPY2 ] = &nve0_copy2_oclass;
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device->oclass[NVDEV_ENGINE_BSP ] = &nve0_bsp_oclass;
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device->oclass[NVDEV_ENGINE_VP ] = &nve0_vp_oclass;
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device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass;
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break;
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case 0x108:
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device->cname = "GK208";
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device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
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@ -44,8 +44,10 @@ static void
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pramin_fini(void *data)
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{
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struct priv *priv = data;
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nv_wr32(priv->bios, 0x001700, priv->bar0);
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kfree(priv);
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if (priv) {
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nv_wr32(priv->bios, 0x001700, priv->bar0);
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kfree(priv);
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}
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}
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static void *
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@ -24,34 +24,71 @@
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#include "nv50.h"
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struct nvaa_ram_priv {
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struct nouveau_ram base;
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u64 poller_base;
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};
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static int
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nvaa_ram_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
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struct nouveau_oclass *oclass, void *data, u32 datasize,
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struct nouveau_object **pobject)
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{
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const u32 rsvd_head = ( 256 * 1024) >> 12; /* vga memory */
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const u32 rsvd_tail = (1024 * 1024) >> 12; /* vbios etc */
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u32 rsvd_head = ( 256 * 1024); /* vga memory */
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u32 rsvd_tail = (1024 * 1024); /* vbios etc */
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struct nouveau_fb *pfb = nouveau_fb(parent);
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struct nouveau_ram *ram;
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struct nvaa_ram_priv *priv;
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int ret;
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ret = nouveau_ram_create(parent, engine, oclass, &ram);
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*pobject = nv_object(ram);
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ret = nouveau_ram_create(parent, engine, oclass, &priv);
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*pobject = nv_object(priv);
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if (ret)
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return ret;
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ram->size = nv_rd32(pfb, 0x10020c);
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ram->size = (ram->size & 0xffffff00) | ((ram->size & 0x000000ff) << 32);
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priv->base.type = NV_MEM_TYPE_STOLEN;
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priv->base.stolen = (u64)nv_rd32(pfb, 0x100e10) << 12;
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priv->base.size = (u64)nv_rd32(pfb, 0x100e14) << 12;
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ret = nouveau_mm_init(&pfb->vram, rsvd_head, (ram->size >> 12) -
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(rsvd_head + rsvd_tail), 1);
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rsvd_tail += 0x1000;
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priv->poller_base = priv->base.size - rsvd_tail;
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ret = nouveau_mm_init(&pfb->vram, rsvd_head >> 12,
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(priv->base.size - (rsvd_head + rsvd_tail)) >> 12,
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1);
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if (ret)
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return ret;
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ram->type = NV_MEM_TYPE_STOLEN;
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ram->stolen = (u64)nv_rd32(pfb, 0x100e10) << 12;
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ram->get = nv50_ram_get;
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ram->put = nv50_ram_put;
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priv->base.get = nv50_ram_get;
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priv->base.put = nv50_ram_put;
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return 0;
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}
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static int
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nvaa_ram_init(struct nouveau_object *object)
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{
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struct nouveau_fb *pfb = nouveau_fb(object);
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struct nvaa_ram_priv *priv = (void *)object;
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int ret;
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u64 dniso, hostnb, flush;
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ret = nouveau_ram_init(&priv->base);
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if (ret)
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return ret;
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dniso = ((priv->base.size - (priv->poller_base + 0x00)) >> 5) - 1;
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hostnb = ((priv->base.size - (priv->poller_base + 0x20)) >> 5) - 1;
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flush = ((priv->base.size - (priv->poller_base + 0x40)) >> 5) - 1;
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/* Enable NISO poller for various clients and set their associated
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* read address, only for MCP77/78 and MCP79/7A. (fd#25701)
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*/
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nv_wr32(pfb, 0x100c18, dniso);
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nv_mask(pfb, 0x100c14, 0x00000000, 0x00000001);
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nv_wr32(pfb, 0x100c1c, hostnb);
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nv_mask(pfb, 0x100c14, 0x00000000, 0x00000002);
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nv_wr32(pfb, 0x100c24, flush);
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nv_mask(pfb, 0x100c14, 0x00000000, 0x00010000);
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return 0;
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}
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@ -60,7 +97,7 @@ nvaa_ram_oclass = {
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.ofuncs = &(struct nouveau_ofuncs) {
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.ctor = nvaa_ram_ctor,
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.dtor = _nouveau_ram_dtor,
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.init = _nouveau_ram_init,
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.init = nvaa_ram_init,
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.fini = _nouveau_ram_fini,
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},
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};
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@ -24,13 +24,6 @@
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#include "nv04.h"
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static void
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nv4c_mc_msi_rearm(struct nouveau_mc *pmc)
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{
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struct nv04_mc_priv *priv = (void *)pmc;
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nv_wr08(priv, 0x088050, 0xff);
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}
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struct nouveau_oclass *
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nv4c_mc_oclass = &(struct nouveau_mc_oclass) {
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.base.handle = NV_SUBDEV(MC, 0x4c),
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@ -41,5 +34,4 @@ nv4c_mc_oclass = &(struct nouveau_mc_oclass) {
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.fini = _nouveau_mc_fini,
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},
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.intr = nv04_mc_intr,
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.msi_rearm = nv4c_mc_msi_rearm,
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}.base;
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@ -1572,8 +1572,10 @@ nouveau_ttm_tt_unpopulate(struct ttm_tt *ttm)
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* so use the DMA API for them.
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*/
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if (!nv_device_is_cpu_coherent(device) &&
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ttm->caching_state == tt_uncached)
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ttm->caching_state == tt_uncached) {
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ttm_dma_unpopulate(ttm_dma, dev->dev);
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return;
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}
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#if __OS_HAS_AGP
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if (drm->agp.stat == ENABLED) {
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@ -36,7 +36,14 @@ void
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nouveau_gem_object_del(struct drm_gem_object *gem)
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{
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struct nouveau_bo *nvbo = nouveau_gem_object(gem);
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struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev);
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struct ttm_buffer_object *bo = &nvbo->bo;
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struct device *dev = drm->dev->dev;
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int ret;
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ret = pm_runtime_get_sync(dev);
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if (WARN_ON(ret < 0 && ret != -EACCES))
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return;
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if (gem->import_attach)
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drm_prime_gem_destroy(gem, nvbo->bo.sg);
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@ -46,6 +53,9 @@ nouveau_gem_object_del(struct drm_gem_object *gem)
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/* reset filp so nouveau_bo_del_ttm() can test for it */
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gem->filp = NULL;
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ttm_bo_unref(&bo);
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pm_runtime_mark_last_busy(dev);
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pm_runtime_put_autosuspend(dev);
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}
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int
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@ -53,7 +63,9 @@ nouveau_gem_object_open(struct drm_gem_object *gem, struct drm_file *file_priv)
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{
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struct nouveau_cli *cli = nouveau_cli(file_priv);
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struct nouveau_bo *nvbo = nouveau_gem_object(gem);
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struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev);
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struct nouveau_vma *vma;
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struct device *dev = drm->dev->dev;
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int ret;
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if (!cli->vm)
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@ -71,11 +83,16 @@ nouveau_gem_object_open(struct drm_gem_object *gem, struct drm_file *file_priv)
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goto out;
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}
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ret = nouveau_bo_vma_add(nvbo, cli->vm, vma);
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if (ret) {
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kfree(vma);
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ret = pm_runtime_get_sync(dev);
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if (ret < 0 && ret != -EACCES)
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goto out;
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}
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ret = nouveau_bo_vma_add(nvbo, cli->vm, vma);
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if (ret)
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kfree(vma);
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pm_runtime_mark_last_busy(dev);
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pm_runtime_put_autosuspend(dev);
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} else {
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vma->refcount++;
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}
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@ -129,6 +146,8 @@ nouveau_gem_object_close(struct drm_gem_object *gem, struct drm_file *file_priv)
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{
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struct nouveau_cli *cli = nouveau_cli(file_priv);
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struct nouveau_bo *nvbo = nouveau_gem_object(gem);
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struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev);
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struct device *dev = drm->dev->dev;
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struct nouveau_vma *vma;
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int ret;
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@ -141,8 +160,14 @@ nouveau_gem_object_close(struct drm_gem_object *gem, struct drm_file *file_priv)
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vma = nouveau_bo_vma_find(nvbo, cli->vm);
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if (vma) {
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if (--vma->refcount == 0)
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nouveau_gem_object_unmap(nvbo, vma);
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if (--vma->refcount == 0) {
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ret = pm_runtime_get_sync(dev);
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if (!WARN_ON(ret < 0 && ret != -EACCES)) {
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nouveau_gem_object_unmap(nvbo, vma);
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pm_runtime_mark_last_busy(dev);
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pm_runtime_put_autosuspend(dev);
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}
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}
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}
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ttm_bo_unreserve(&nvbo->bo);
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}
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