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csky: Support dynamic start physical address
Before this patch csky-linux need CONFIG_RAM_BASE to determine start physical address. Now we use phys_offset variable to replace the macro of PHYS_OFFSET and we setup phys_offset with real physical address which is determined during startup in head.S. With this patch we needn't re-compile kernel for different start physical address. ie: 0x0 / 0xc0000000 start physical address could use the same vmlinux, be care different start address must be 512MB aligned. Signed-off-by: Guo Ren <ren_guo@c-sky.com> Cc: Arnd Bergmann <arnd@arndb.de>
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Guo Ren
parent
bf24168293
commit
f62e31623d
@ -40,6 +40,26 @@ static inline void write_mmu_entryhi(int value)
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cpwcr("cpcr4", value);
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}
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static inline unsigned long read_mmu_msa0(void)
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{
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return cprcr("cpcr30");
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}
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static inline void write_mmu_msa0(unsigned long value)
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{
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cpwcr("cpcr30", value);
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}
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static inline unsigned long read_mmu_msa1(void)
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{
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return cprcr("cpcr31");
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}
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static inline void write_mmu_msa1(unsigned long value)
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{
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cpwcr("cpcr31", value);
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}
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/*
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* TLB operations.
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*/
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@ -144,9 +144,24 @@
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.endm
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.macro SETUP_MMU rx
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lrw \rx, PHYS_OFFSET | 0xe
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/* Select MMU as co-processor */
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cpseti cp15
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/*
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* cpcr30 format:
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* 31 - 29 | 28 - 4 | 3 | 2 | 1 | 0
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* BA Reserved C D V
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*/
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cprcr \rx, cpcr30
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lsri \rx, 28
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lsli \rx, 28
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addi \rx, 0xe
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cpwcr \rx, cpcr30
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lrw \rx, (PHYS_OFFSET + 0x20000000) | 0xe
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lsri \rx, 28
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addi \rx, 2
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lsli \rx, 28
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addi \rx, 0xe
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cpwcr \rx, cpcr31
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.endm
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@ -42,6 +42,26 @@ static inline void write_mmu_entryhi(int value)
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mtcr("cr<4, 15>", value);
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}
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static inline unsigned long read_mmu_msa0(void)
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{
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return mfcr("cr<30, 15>");
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}
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static inline void write_mmu_msa0(unsigned long value)
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{
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mtcr("cr<30, 15>", value);
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}
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static inline unsigned long read_mmu_msa1(void)
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{
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return mfcr("cr<31, 15>");
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}
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static inline void write_mmu_msa1(unsigned long value)
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{
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mtcr("cr<31, 15>", value);
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}
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/*
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* TLB operations.
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*/
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@ -163,9 +163,29 @@
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.endm
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.macro SETUP_MMU rx
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lrw \rx, PHYS_OFFSET | 0xe
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/* Check MMU on | off */
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mfcr \rx, cr18
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btsti \rx, 0
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bt 1f
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grs \rx, 1f
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br 2f
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1:
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/*
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* cr<30, 15> format:
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* 31 - 29 | 28 - 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
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* BA Reserved SH WA B SO SEC C D V
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*/
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mfcr \rx, cr<30, 15>
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2:
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lsri \rx, 28
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lsli \rx, 28
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addi \rx, 0x1ce
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mtcr \rx, cr<30, 15>
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lrw \rx, (PHYS_OFFSET + 0x20000000) | 0xe
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lsri \rx, 28
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addi \rx, 2
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lsli \rx, 28
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addi \rx, 0x1ce
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mtcr \rx, cr<31, 15>
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.endm
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@ -17,7 +17,7 @@
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static inline void tlbmiss_handler_setup_pgd(unsigned long pgd, bool kernel)
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{
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pgd -= PAGE_OFFSET;
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pgd += PHYS_OFFSET;
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pgd += phys_offset;
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pgd |= 1;
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setup_pgd(pgd, kernel);
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}
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@ -29,7 +29,7 @@ static inline void tlbmiss_handler_setup_pgd(unsigned long pgd, bool kernel)
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static inline unsigned long tlb_get_pgd(void)
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{
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return ((get_pgd() - PHYS_OFFSET) & ~1) + PAGE_OFFSET;
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return ((get_pgd() - phys_offset) & ~1) + PAGE_OFFSET;
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}
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#define cpu_context(cpu, mm) ((mm)->context.asid[cpu])
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@ -8,7 +8,7 @@
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#include <linux/const.h>
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/*
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* PAGE_SHIFT determines the page size
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* PAGE_SHIFT determines the page size: 4KB
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*/
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#define PAGE_SHIFT 12
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#define PAGE_SIZE (_AC(1, UL) << PAGE_SHIFT)
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@ -17,12 +17,18 @@
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#define THREAD_MASK (~(THREAD_SIZE - 1))
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#define THREAD_SHIFT (PAGE_SHIFT + 1)
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/*
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* NOTE: virtual isn't really correct, actually it should be the offset into the
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* memory node, but we have no highmem, so that works for now.
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* TODO: implement (fast) pfn<->pgdat_idx conversion functions, this makes lots
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* of the shifts unnecessary.
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* For C-SKY "User-space:Kernel-space" is "2GB:2GB" fixed by hardware and there
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* are two segment registers (MSA0 + MSA1) to mapping 512MB + 512MB physical
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* address region. We use them mapping kernel 1GB direct-map address area and
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* for more than 1GB of memory we use highmem.
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*/
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#define PAGE_OFFSET 0x80000000
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#define SSEG_SIZE 0x20000000
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#define LOWMEM_LIMIT (SSEG_SIZE * 2)
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#define PHYS_OFFSET_OFFSET (CONFIG_RAM_BASE & (SSEG_SIZE - 1))
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#ifndef __ASSEMBLY__
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@ -50,9 +56,6 @@ struct page;
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struct vm_area_struct;
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/*
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* These are used to make use of C type-checking..
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*/
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typedef struct { unsigned long pte_low; } pte_t;
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#define pte_val(x) ((x).pte_low)
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@ -69,18 +72,13 @@ typedef struct page *pgtable_t;
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#define __pgd(x) ((pgd_t) { (x) })
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#define __pgprot(x) ((pgprot_t) { (x) })
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#endif /* !__ASSEMBLY__ */
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extern unsigned long phys_offset;
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#define PHYS_OFFSET (CONFIG_RAM_BASE & ~(LOWMEM_LIMIT - 1))
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#define PHYS_OFFSET_OFFSET (CONFIG_RAM_BASE & (LOWMEM_LIMIT - 1))
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#define ARCH_PFN_OFFSET PFN_DOWN(CONFIG_RAM_BASE)
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#define ARCH_PFN_OFFSET PFN_DOWN(phys_offset + PHYS_OFFSET_OFFSET)
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#define PAGE_OFFSET 0x80000000
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#define LOWMEM_LIMIT 0x40000000
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#define __pa(x) ((unsigned long)(x) - PAGE_OFFSET + PHYS_OFFSET)
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#define __pa(x) ((unsigned long)(x) - PAGE_OFFSET + phys_offset)
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#define __va(x) ((void *)((unsigned long)(x) + PAGE_OFFSET - \
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PHYS_OFFSET))
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phys_offset))
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#define __pa_symbol(x) __pa(RELOC_HIDE((unsigned long)(x), 0))
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#define MAP_NR(x) PFN_DOWN((unsigned long)(x) - PAGE_OFFSET - \
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@ -90,15 +88,10 @@ typedef struct page *pgtable_t;
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#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \
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VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
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/*
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* main RAM and kernel working space are coincident at 0x80000000, but to make
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* life more interesting, there's also an uncached virtual shadow at 0xb0000000
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* - these mappings are fixed in the MMU
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*/
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#define pfn_to_kaddr(x) __va(PFN_PHYS(x))
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#include <asm-generic/memory_model.h>
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#include <asm-generic/getorder.h>
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#endif /* !__ASSEMBLY__ */
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#endif /* __ASM_CSKY_PAGE_H */
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@ -40,7 +40,8 @@ ENTRY(csky_\name)
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WR_MCIR a2
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#endif
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bclri r6, 0
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lrw a2, PHYS_OFFSET
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lrw a2, phys_offset
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ld.w a2, (a2, 0)
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subu r6, a2
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bseti r6, 31
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@ -50,7 +51,8 @@ ENTRY(csky_\name)
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addu r6, a2
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ldw r6, (r6)
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lrw a2, PHYS_OFFSET
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lrw a2, phys_offset
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ld.w a2, (a2, 0)
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subu r6, a2
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bseti r6, 31
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@ -142,11 +142,16 @@ void __init setup_arch(char **cmdline_p)
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#endif
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}
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unsigned long phys_offset;
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EXPORT_SYMBOL(phys_offset);
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asmlinkage __visible void __init csky_start(unsigned int unused, void *param)
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{
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/* Clean up bss section */
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memset(__bss_start, 0, __bss_stop - __bss_start);
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phys_offset = read_mmu_msa0() & ~(SSEG_SIZE - 1);
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pre_trap_init();
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pre_mmu_init();
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