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dmaengine: edma: predecence bug in GET_NUM_QDMACH()
The current code uses bits 0-2 instead of 4-6 as the comment says.
Fixes: 633e42b8c5
('dmaengine: edma: Get qDMA channel information from HW also')
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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@ -107,7 +107,7 @@
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/* CCCFG register */
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#define GET_NUM_DMACH(x) (x & 0x7) /* bits 0-2 */
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#define GET_NUM_QDMACH(x) (x & 0x70 >> 4) /* bits 4-6 */
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#define GET_NUM_QDMACH(x) ((x & 0x70) >> 4) /* bits 4-6 */
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#define GET_NUM_PAENTRY(x) ((x & 0x7000) >> 12) /* bits 12-14 */
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#define GET_NUM_EVQUE(x) ((x & 0x70000) >> 16) /* bits 16-18 */
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#define GET_NUM_REGN(x) ((x & 0x300000) >> 20) /* bits 20-21 */
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