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Merge remote-tracking branch 'asoc/topic/wm8962' into asoc-next
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commit
f57019aa0a
@ -8,9 +8,32 @@ Required properties:
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- reg : the I2C address of the device.
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Optional properties:
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- spk-mono: This is a boolean property. If present, the SPK_MONO bit
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of R51 (Class D Control 2) gets set, indicating that the speaker is
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in mono mode.
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- mic-cfg : Default register value for R48 (Additional Control 4).
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If absent, the default should be the register default.
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- gpio-cfg : A list of GPIO configuration register values. The list must
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be 6 entries long. If absent, no configuration of these registers is
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performed. And note that only the value within [0x0, 0xffff] is valid.
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Any other value is regarded as setting the GPIO register by its reset
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value 0x0.
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Example:
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codec: wm8962@1a {
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compatible = "wlf,wm8962";
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reg = <0x1a>;
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gpio-cfg = <
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0x0000 /* 0:Default */
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0x0000 /* 1:Default */
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0x0013 /* 2:FN_DMICCLK */
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0x0000 /* 3:Default */
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0x8014 /* 4:FN_DMICCDAT */
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0x0000 /* 5:Default */
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>;
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};
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@ -51,6 +51,7 @@ static const char *wm8962_supply_names[WM8962_NUM_SUPPLIES] = {
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/* codec private data */
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struct wm8962_priv {
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struct wm8962_pdata pdata;
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struct regmap *regmap;
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struct snd_soc_codec *codec;
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@ -2347,12 +2348,13 @@ static const struct snd_soc_dapm_route wm8962_spk_stereo_intercon[] = {
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static int wm8962_add_widgets(struct snd_soc_codec *codec)
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{
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struct wm8962_pdata *pdata = dev_get_platdata(codec->dev);
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struct wm8962_priv *wm8962 = snd_soc_codec_get_drvdata(codec);
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struct wm8962_pdata *pdata = &wm8962->pdata;
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struct snd_soc_dapm_context *dapm = &codec->dapm;
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snd_soc_add_codec_controls(codec, wm8962_snd_controls,
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ARRAY_SIZE(wm8962_snd_controls));
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if (pdata && pdata->spk_mono)
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if (pdata->spk_mono)
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snd_soc_add_codec_controls(codec, wm8962_spk_mono_controls,
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ARRAY_SIZE(wm8962_spk_mono_controls));
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else
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@ -2362,7 +2364,7 @@ static int wm8962_add_widgets(struct snd_soc_codec *codec)
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snd_soc_dapm_new_controls(dapm, wm8962_dapm_widgets,
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ARRAY_SIZE(wm8962_dapm_widgets));
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if (pdata && pdata->spk_mono)
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if (pdata->spk_mono)
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snd_soc_dapm_new_controls(dapm, wm8962_dapm_spk_mono_widgets,
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ARRAY_SIZE(wm8962_dapm_spk_mono_widgets));
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else
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@ -2371,7 +2373,7 @@ static int wm8962_add_widgets(struct snd_soc_codec *codec)
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snd_soc_dapm_add_routes(dapm, wm8962_intercon,
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ARRAY_SIZE(wm8962_intercon));
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if (pdata && pdata->spk_mono)
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if (pdata->spk_mono)
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snd_soc_dapm_add_routes(dapm, wm8962_spk_mono_intercon,
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ARRAY_SIZE(wm8962_spk_mono_intercon));
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else
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@ -3335,14 +3337,14 @@ static struct gpio_chip wm8962_template_chip = {
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static void wm8962_init_gpio(struct snd_soc_codec *codec)
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{
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struct wm8962_priv *wm8962 = snd_soc_codec_get_drvdata(codec);
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struct wm8962_pdata *pdata = dev_get_platdata(codec->dev);
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struct wm8962_pdata *pdata = &wm8962->pdata;
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int ret;
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wm8962->gpio_chip = wm8962_template_chip;
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wm8962->gpio_chip.ngpio = WM8962_MAX_GPIO;
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wm8962->gpio_chip.dev = codec->dev;
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if (pdata && pdata->gpio_base)
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if (pdata->gpio_base)
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wm8962->gpio_chip.base = pdata->gpio_base;
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else
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wm8962->gpio_chip.base = -1;
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@ -3422,7 +3424,6 @@ static int wm8962_probe(struct snd_soc_codec *codec)
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WM8962_OSC_ENA | WM8962_PLL2_ENA | WM8962_PLL3_ENA,
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0);
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if (pdata) {
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/* Apply static configuration for GPIOs */
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for (i = 0; i < ARRAY_SIZE(pdata->gpio_init); i++)
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if (pdata->gpio_init[i]) {
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@ -3431,12 +3432,12 @@ static int wm8962_probe(struct snd_soc_codec *codec)
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pdata->gpio_init[i] & 0xffff);
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}
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/* Put the speakers into mono mode? */
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if (pdata->spk_mono)
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snd_soc_update_bits(codec, WM8962_CLASS_D_CONTROL_2,
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WM8962_SPK_MONO_MASK, WM8962_SPK_MONO);
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/* Micbias setup, detection enable and detection
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* threasholds. */
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if (pdata->mic_cfg)
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@ -3446,7 +3447,6 @@ static int wm8962_probe(struct snd_soc_codec *codec)
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WM8962_MICSHORT_THR_MASK |
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WM8962_MICBIAS_LVL,
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pdata->mic_cfg);
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}
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/* Latch volume update bits */
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snd_soc_update_bits(codec, WM8962_LEFT_INPUT_VOLUME,
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@ -3508,7 +3508,7 @@ static int wm8962_probe(struct snd_soc_codec *codec)
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wm8962_init_gpio(codec);
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if (wm8962->irq) {
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if (pdata && pdata->irq_active_low) {
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if (pdata->irq_active_low) {
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trigger = IRQF_TRIGGER_LOW;
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irq_pol = WM8962_IRQ_POL;
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} else {
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@ -3586,6 +3586,34 @@ static const struct regmap_config wm8962_regmap = {
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.cache_type = REGCACHE_RBTREE,
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};
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static int wm8962_set_pdata_from_of(struct i2c_client *i2c,
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struct wm8962_pdata *pdata)
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{
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const struct device_node *np = i2c->dev.of_node;
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u32 val32;
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int i;
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if (of_property_read_bool(np, "spk-mono"))
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pdata->spk_mono = true;
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if (of_property_read_u32(np, "mic-cfg", &val32) >= 0)
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pdata->mic_cfg = val32;
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if (of_property_read_u32_array(np, "gpio-cfg", pdata->gpio_init,
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ARRAY_SIZE(pdata->gpio_init)) >= 0)
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for (i = 0; i < ARRAY_SIZE(pdata->gpio_init); i++) {
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/*
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* The range of GPIO register value is [0x0, 0xffff]
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* While the default value of each register is 0x0
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* Any other value will be regarded as default value
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*/
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if (pdata->gpio_init[i] > 0xffff)
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pdata->gpio_init[i] = 0x0;
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}
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return 0;
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}
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static int wm8962_i2c_probe(struct i2c_client *i2c,
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const struct i2c_device_id *id)
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{
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@ -3605,6 +3633,15 @@ static int wm8962_i2c_probe(struct i2c_client *i2c,
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init_completion(&wm8962->fll_lock);
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wm8962->irq = i2c->irq;
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/* If platform data was supplied, update the default data in priv */
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if (pdata) {
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memcpy(&wm8962->pdata, pdata, sizeof(struct wm8962_pdata));
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} else if (i2c->dev.of_node) {
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ret = wm8962_set_pdata_from_of(i2c, &wm8962->pdata);
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if (ret != 0)
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return ret;
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}
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for (i = 0; i < ARRAY_SIZE(wm8962->supplies); i++)
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wm8962->supplies[i].supply = wm8962_supply_names[i];
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@ -3668,7 +3705,7 @@ static int wm8962_i2c_probe(struct i2c_client *i2c,
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goto err_enable;
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}
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if (pdata && pdata->in4_dc_measure) {
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if (wm8962->pdata.in4_dc_measure) {
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ret = regmap_register_patch(wm8962->regmap,
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wm8962_dc_measure,
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ARRAY_SIZE(wm8962_dc_measure));
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@ -3721,6 +3758,21 @@ static int wm8962_runtime_resume(struct device *dev)
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wm8962_reset(wm8962);
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/* SYSCLK defaults to on; make sure it is off so we can safely
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* write to registers if the device is declocked.
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*/
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regmap_update_bits(wm8962->regmap, WM8962_CLOCKING2,
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WM8962_SYSCLK_ENA, 0);
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/* Ensure we have soft control over all registers */
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regmap_update_bits(wm8962->regmap, WM8962_CLOCKING2,
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WM8962_CLKREG_OVD, WM8962_CLKREG_OVD);
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/* Ensure that the oscillator and PLLs are disabled */
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regmap_update_bits(wm8962->regmap, WM8962_PLL2,
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WM8962_OSC_ENA | WM8962_PLL2_ENA | WM8962_PLL3_ENA,
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0);
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regcache_sync(wm8962->regmap);
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regmap_update_bits(wm8962->regmap, WM8962_ANTI_POP,
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