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arm64: dts: ti: k3-j784s4-main: Add node for EHRPWMs
Add dts nodes for 6 EHRPWM instances on SoC. Signed-off-by: Dasnavis Sabiya <sabiya.d@ti.com> Signed-off-by: Udit Kumar <u-kumar1@ti.com> Link: https://lore.kernel.org/r/20240603112938.2188510-1-u-kumar1@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
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@ -115,6 +115,72 @@
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#mux-control-cells = <1>;
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mux-reg-masks = <0x0 0x8000000>; /* USB0 to SERDES0 lane 3 mux */
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};
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ehrpwm_tbclk: clock-controller@4140 {
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compatible = "ti,am654-ehrpwm-tbclk";
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reg = <0x4140 0x18>;
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#clock-cells = <1>;
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};
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};
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main_ehrpwm0: pwm@3000000 {
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compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
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reg = <0x00 0x3000000 0x00 0x100>;
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clocks = <&ehrpwm_tbclk 0>, <&k3_clks 219 0>;
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clock-names = "tbclk", "fck";
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power-domains = <&k3_pds 219 TI_SCI_PD_EXCLUSIVE>;
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#pwm-cells = <3>;
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status = "disabled";
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};
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main_ehrpwm1: pwm@3010000 {
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compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
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reg = <0x00 0x3010000 0x00 0x100>;
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clocks = <&ehrpwm_tbclk 1>, <&k3_clks 220 0>;
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clock-names = "tbclk", "fck";
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power-domains = <&k3_pds 220 TI_SCI_PD_EXCLUSIVE>;
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#pwm-cells = <3>;
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status = "disabled";
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};
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main_ehrpwm2: pwm@3020000 {
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compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
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reg = <0x00 0x3020000 0x00 0x100>;
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clocks = <&ehrpwm_tbclk 2>, <&k3_clks 221 0>;
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clock-names = "tbclk", "fck";
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power-domains = <&k3_pds 221 TI_SCI_PD_EXCLUSIVE>;
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#pwm-cells = <3>;
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status = "disabled";
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};
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main_ehrpwm3: pwm@3030000 {
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compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
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reg = <0x00 0x3030000 0x00 0x100>;
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clocks = <&ehrpwm_tbclk 3>, <&k3_clks 222 0>;
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clock-names = "tbclk", "fck";
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power-domains = <&k3_pds 222 TI_SCI_PD_EXCLUSIVE>;
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#pwm-cells = <3>;
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status = "disabled";
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};
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main_ehrpwm4: pwm@3040000 {
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compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
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reg = <0x00 0x3040000 0x00 0x100>;
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clocks = <&ehrpwm_tbclk 4>, <&k3_clks 223 0>;
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clock-names = "tbclk", "fck";
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power-domains = <&k3_pds 223 TI_SCI_PD_EXCLUSIVE>;
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#pwm-cells = <3>;
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status = "disabled";
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};
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main_ehrpwm5: pwm@3050000 {
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compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
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reg = <0x00 0x3050000 0x00 0x100>;
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clocks = <&ehrpwm_tbclk 5>, <&k3_clks 224 0>;
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clock-names = "tbclk", "fck";
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power-domains = <&k3_pds 224 TI_SCI_PD_EXCLUSIVE>;
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#pwm-cells = <3>;
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status = "disabled";
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};
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gic500: interrupt-controller@1800000 {
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