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dmaengine fixes for v5.11

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Bunch of dmaengine driver fixes for:
 - coverity discovered issues for xilinx driver
 - qcom, gpi driver fix for undefined bhaviour and one off cleanup
 - Update Peter's email for TI DMA drivers
 - one off for idxd driver
 - resource leak fix for mediatek and milbeaut drivers
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Merge tag 'dmaengine-fix-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine

Pull dmaengine fixes from Vinod Koul:
 "A bunch of dmaengine driver fixes for:

   - coverity discovered issues for xilinx driver

   - qcom, gpi driver fix for undefined bhaviour and one off cleanup

   - update Peter's email for TI DMA drivers

   - one-off for idxd driver

   - resource leak fix for mediatek and milbeaut drivers"

* tag 'dmaengine-fix-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine:
  dmaengine: stm32-mdma: fix STM32_MDMA_VERY_HIGH_PRIORITY value
  dmaengine: xilinx_dma: fix mixed_enum_type coverity warning
  dmaengine: xilinx_dma: fix incompatible param warning in _child_probe()
  dmaengine: xilinx_dma: check dma_async_device_register return value
  dmaengine: qcom: fix gpi undefined behavior
  dt-bindings: dma: ti: Update maintainer and author information
  MAINTAINERS: Add entry for Texas Instruments DMA drivers
  qcom: bam_dma: Delete useless kfree code
  dmaengine: dw-edma: Fix use after free in dw_edma_alloc_chunk()
  dmaengine: milbeaut-xdmac: Fix a resource leak in the error handling path of the probe function
  dmaengine: mediatek: mtk-hsdma: Fix a resource leak in the error handling path of the probe function
  dmaengine: qcom: gpi: Fixes a format mismatch
  dmaengine: idxd: off by one in cleanup code
  dmaengine: ti: k3-udma: Fix pktdma rchan TPL level setup
This commit is contained in:
Linus Torvalds 2021-01-09 11:18:02 -08:00
commit f408126be7
13 changed files with 48 additions and 25 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
Documentation/devicetree/bindings/dma/ti/k3-bcdma.yaml
View File

@ -1,4 +1,6 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
# Copyright (C) 2020 Texas Instruments Incorporated
# Author: Peter Ujfalusi <peter.ujfalusi@ti.com>
%YAML 1.2
---
$id: http://devicetree.org/schemas/dma/ti/k3-bcdma.yaml#
@ -7,7 +9,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Texas Instruments K3 DMSS BCDMA Device Tree Bindings
maintainers:
- Peter Ujfalusi <peter.ujfalusi@ti.com>
- Peter Ujfalusi <peter.ujfalusi@gmail.com>
description: |
The Block Copy DMA (BCDMA) is intended to perform similar functions as the TR

4
Documentation/devicetree/bindings/dma/ti/k3-pktdma.yaml
View File

@ -1,4 +1,6 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
# Copyright (C) 2020 Texas Instruments Incorporated
# Author: Peter Ujfalusi <peter.ujfalusi@ti.com>
%YAML 1.2
---
$id: http://devicetree.org/schemas/dma/ti/k3-pktdma.yaml#
@ -7,7 +9,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Texas Instruments K3 DMSS PKTDMA Device Tree Bindings
maintainers:
- Peter Ujfalusi <peter.ujfalusi@ti.com>
- Peter Ujfalusi <peter.ujfalusi@gmail.com>
description: |
The Packet DMA (PKTDMA) is intended to perform similar functions as the packet

4
Documentation/devicetree/bindings/dma/ti/k3-udma.yaml
View File

@ -1,4 +1,6 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
# Copyright (C) 2019 Texas Instruments Incorporated
# Author: Peter Ujfalusi <peter.ujfalusi@ti.com>
%YAML 1.2
---
$id: http://devicetree.org/schemas/dma/ti/k3-udma.yaml#
@ -7,7 +9,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Texas Instruments K3 NAVSS Unified DMA Device Tree Bindings
maintainers:
- Peter Ujfalusi <peter.ujfalusi@ti.com>
- Peter Ujfalusi <peter.ujfalusi@gmail.com>
description: |
The UDMA-P is intended to perform similar (but significantly upgraded)

13
MAINTAINERS
View File

@ -17552,6 +17552,19 @@ S: Supported
F: Documentation/devicetree/bindings/iio/dac/ti,dac7612.txt
F: drivers/iio/dac/ti-dac7612.c
TEXAS INSTRUMENTS DMA DRIVERS
M: Peter Ujfalusi <peter.ujfalusi@gmail.com>
L: dmaengine@vger.kernel.org
S: Maintained
F: Documentation/devicetree/bindings/dma/ti-dma-crossbar.txt
F: Documentation/devicetree/bindings/dma/ti-edma.txt
F: Documentation/devicetree/bindings/dma/ti/
F: drivers/dma/ti/
X: drivers/dma/ti/cppi41.c
F: include/linux/dma/k3-udma-glue.h
F: include/linux/dma/ti-cppi5.h
F: include/linux/dma/k3-psil.h
TEXAS INSTRUMENTS' SYSTEM CONTROL INTERFACE (TISCI) PROTOCOL DRIVER
M: Nishanth Menon <nm@ti.com>
M: Tero Kristo <t-kristo@ti.com>

4
drivers/dma/dw-edma/dw-edma-core.c
View File

@ -86,12 +86,12 @@ static struct dw_edma_chunk *dw_edma_alloc_chunk(struct dw_edma_desc *desc)
if (desc->chunk) {
/* Create and add new element into the linked list */
desc->chunks_alloc++;
list_add_tail(&chunk->list, &desc->chunk->list);
if (!dw_edma_alloc_burst(chunk)) {
kfree(chunk);
return NULL;
}
desc->chunks_alloc++;
list_add_tail(&chunk->list, &desc->chunk->list);
} else {
/* List head */
chunk->burst = NULL;

4
drivers/dma/idxd/sysfs.c
View File

@ -434,7 +434,7 @@ int idxd_register_driver(void)
return 0;
drv_fail:
for (; i > 0; i--)
while (--i >= 0)
driver_unregister(&idxd_drvs[i]->drv);
return rc;
}
@ -1840,7 +1840,7 @@ int idxd_register_bus_type(void)
return 0;
bus_err:
for (; i > 0; i--)
while (--i >= 0)
bus_unregister(idxd_bus_types[i]);
return rc;
}

1
drivers/dma/mediatek/mtk-hsdma.c
View File

@ -1007,6 +1007,7 @@ static int mtk_hsdma_probe(struct platform_device *pdev)
return 0;
err_free:
mtk_hsdma_hw_deinit(hsdma);
of_dma_controller_free(pdev->dev.of_node);
err_unregister:
dma_async_device_unregister(dd);

4
drivers/dma/milbeaut-xdmac.c
View File

@ -350,7 +350,7 @@ static int milbeaut_xdmac_probe(struct platform_device *pdev)
ret = dma_async_device_register(ddev);
if (ret)
return ret;
goto disable_xdmac;
ret = of_dma_controller_register(dev->of_node,
of_dma_simple_xlate, mdev);
@ -363,6 +363,8 @@ static int milbeaut_xdmac_probe(struct platform_device *pdev)
unregister_dmac:
dma_async_device_unregister(ddev);
disable_xdmac:
disable_xdmac(mdev);
return ret;
}

6
drivers/dma/qcom/bam_dma.c
View File

@ -630,7 +630,7 @@ static struct dma_async_tx_descriptor *bam_prep_slave_sg(struct dma_chan *chan,
GFP_NOWAIT);
if (!async_desc)
goto err_out;
return NULL;
if (flags & DMA_PREP_FENCE)
async_desc->flags |= DESC_FLAG_NWD;
@ -670,10 +670,6 @@ static struct dma_async_tx_descriptor *bam_prep_slave_sg(struct dma_chan *chan,
}
return vchan_tx_prep(&bchan->vc, &async_desc->vd, flags);
err_out:
kfree(async_desc);
return NULL;
}
/**

10
drivers/dma/qcom/gpi.c
View File

@ -1416,7 +1416,7 @@ static int gpi_alloc_ring(struct gpi_ring *ring, u32 elements,
len = 1 << bit;
ring->alloc_size = (len + (len - 1));
dev_dbg(gpii->gpi_dev->dev,
"#el:%u el_size:%u len:%u actual_len:%llu alloc_size:%lu\n",
"#el:%u el_size:%u len:%u actual_len:%llu alloc_size:%zu\n",
elements, el_size, (elements * el_size), len,
ring->alloc_size);
@ -1424,7 +1424,7 @@ static int gpi_alloc_ring(struct gpi_ring *ring, u32 elements,
ring->alloc_size,
&ring->dma_handle, GFP_KERNEL);
if (!ring->pre_aligned) {
dev_err(gpii->gpi_dev->dev, "could not alloc size:%lu mem for ring\n",
dev_err(gpii->gpi_dev->dev, "could not alloc size:%zu mem for ring\n",
ring->alloc_size);
return -ENOMEM;
}
@ -1444,8 +1444,8 @@ static int gpi_alloc_ring(struct gpi_ring *ring, u32 elements,
smp_wmb();
dev_dbg(gpii->gpi_dev->dev,
"phy_pre:0x%0llx phy_alig:0x%0llx len:%u el_size:%u elements:%u\n",
ring->dma_handle, ring->phys_addr, ring->len,
"phy_pre:%pad phy_alig:%pa len:%u el_size:%u elements:%u\n",
&ring->dma_handle, &ring->phys_addr, ring->len,
ring->el_size, ring->elements);
return 0;
@ -1948,7 +1948,7 @@ static int gpi_ch_init(struct gchan *gchan)
return ret;
error_start_chan:
for (i = i - 1; i >= 0; i++) {
for (i = i - 1; i >= 0; i--) {
gpi_stop_chan(&gpii->gchan[i]);
gpi_send_cmd(gpii, gchan, GPI_CH_CMD_RESET);
}

2
drivers/dma/stm32-mdma.c
View File

@ -199,7 +199,7 @@
#define STM32_MDMA_MAX_CHANNELS 63
#define STM32_MDMA_MAX_REQUESTS 256
#define STM32_MDMA_MAX_BURST 128
#define STM32_MDMA_VERY_HIGH_PRIORITY 0x11
#define STM32_MDMA_VERY_HIGH_PRIORITY 0x3
enum stm32_mdma_trigger_mode {
STM32_MDMA_BUFFER,

6
drivers/dma/ti/k3-udma.c
View File

@ -4698,9 +4698,9 @@ static int pktdma_setup_resources(struct udma_dev *ud)
ud->tchan_tpl.levels = 1;
}
ud->tchan_tpl.levels = ud->tchan_tpl.levels;
ud->tchan_tpl.start_idx[0] = ud->tchan_tpl.start_idx[0];
ud->tchan_tpl.start_idx[1] = ud->tchan_tpl.start_idx[1];
ud->rchan_tpl.levels = ud->tchan_tpl.levels;
ud->rchan_tpl.start_idx[0] = ud->tchan_tpl.start_idx[0];
ud->rchan_tpl.start_idx[1] = ud->tchan_tpl.start_idx[1];
ud->tchan_map = devm_kmalloc_array(dev, BITS_TO_LONGS(ud->tchan_cnt),
sizeof(unsigned long), GFP_KERNEL);

11
drivers/dma/xilinx/xilinx_dma.c
View File

@ -2781,7 +2781,7 @@ static int xilinx_dma_chan_probe(struct xilinx_dma_device *xdev,
has_dre = false;
if (!has_dre)
xdev->common.copy_align = fls(width - 1);
xdev->common.copy_align = (enum dmaengine_alignment)fls(width - 1);
if (of_device_is_compatible(node, "xlnx,axi-vdma-mm2s-channel") ||
of_device_is_compatible(node, "xlnx,axi-dma-mm2s-channel") ||
@ -2900,7 +2900,8 @@ static int xilinx_dma_chan_probe(struct xilinx_dma_device *xdev,
static int xilinx_dma_child_probe(struct xilinx_dma_device *xdev,
struct device_node *node)
{
int ret, i, nr_channels = 1;
int ret, i;
u32 nr_channels = 1;
ret = of_property_read_u32(node, "dma-channels", &nr_channels);
if (xdev->dma_config->dmatype == XDMA_TYPE_AXIMCDMA && ret < 0)
@ -3112,7 +3113,11 @@ static int xilinx_dma_probe(struct platform_device *pdev)
}
/* Register the DMA engine with the core */
dma_async_device_register(&xdev->common);
err = dma_async_device_register(&xdev->common);
if (err) {
dev_err(xdev->dev, "failed to register the dma device\n");
goto error;
}
err = of_dma_controller_register(node, of_dma_xilinx_xlate,
xdev);