mirror of
https://github.com/torvalds/linux.git
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arm64 fixes for 6.13-rc2:
- MTE/hugetlbfs: - Set VM_MTE_ALLOWED in the arch code and remove it from the core code for hugetlbfs mappings - Fix copy_highpage() warning when the source is a huge page but not MTE tagged, taking the wrong small page path - drivers/virt/coco: - Add the pKVM and Arm CCA drivers under the arm64 maintainership - Fix the pkvm driver to fall back to ioremap() (and warn) if the MMIO_GUARD hypercall fails - Keep the Arm CCA driver default 'n' rather than 'm' - A series of fixes for the arm64 ptrace() implementation, potentially leading to the kernel consuming uninitialised stack variables when PTRACE_SETREGSET is invoked with a length of 0 - Fix zone_dma_limit calculation when RAM starts below 4GB and ZONE_DMA is capped to this limit - Fix early boot warning with CONFIG_DEBUG_VIRTUAL=y triggered by a call to page_to_phys() (from patch_map()) which checks pfn_valid() before vmemmap has been set up - Do not clobber bits 15:8 of the ASID used for TTBR1_EL1 and TLBI ops when the kernel assumes 8-bit ASIDs but running under a hypervisor on a system that implements 16-bit ASIDs (found running Linux under Parallels on Apple M4) - ACPI/IORT: Add PMCG platform information for HiSilicon HIP09A as it is using the same SMMU PMCG as HIP09 and suffers from the same errata - Add GCS to cpucap_is_possible(), missed in the recent merge -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEE5RElWfyWxS+3PLO2a9axLQDIXvEFAmdTQW4ACgkQa9axLQDI XvGLUQ/+MEiCFytDsSIQsGMaCpRCcrNX3dzhgekjTSiS+iPRTGjhHPMxAgnKgtim U6MIdxItS5bvFKWQC/VmA3V+EtMy+9uwfQOy7MbG+wIzwlg48Pn2MjgmheSxhftO 0x+lUB+5ELU9KxL0KV+WNCE5l/iBpzcSG+Uj3iqc5rPuYHxa8npekd/KVba42zGY QqZ75yCW5EQwyuSZve8SSMqyHNgZHNgwzhs0aRr3ZwccqE9eMKpcEv5wxbl6raGB Qr4HG+c3w4rQFBsj+9Zs/f5G45uZ+pM55aAVLSihhCdq51/oXXPajOWMP3tV6ke+ hHXm4buxgIR2CWeCXp8n/H7S3OQIj4uFqmaFIGxv0+0OTemUBIEg8kAtqVcnxSXY hk00J5yMurDik1hhud21ZHaJaELwWAwpisVCjYBblUGOoH9uH062gb02CGWv3lSe hrzYohhi7IAPzDzK339Q3HVr5PZOGagoBS2B1ptX2f6rrPITIuB2rW+lzNDuuBSX twHcdZzmSgl2zmFu4D3ql5Oa2ewLMiOn0Z96Esz5y9f74jbLh9ynU7QyRZM0MioS V6te7HanJ17zMK6S2thj7qsewqV6N4lcWd7M5ZclK29F8qcW5OWuKn5njFQT7K4s QDI0+1uYaSMcWoDAXNVXZf3oKMJDy1LeG+UXGyP5b0AQJrqYrWQ= =zZ4I -----END PGP SIGNATURE----- Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux Pull arm64 fixes from Catalin Marinas: "Nothing major, some left-overs from the recent merging window (MTE, coco) and some newly found issues like the ptrace() ones. - MTE/hugetlbfs: - Set VM_MTE_ALLOWED in the arch code and remove it from the core code for hugetlbfs mappings - Fix copy_highpage() warning when the source is a huge page but not MTE tagged, taking the wrong small page path - drivers/virt/coco: - Add the pKVM and Arm CCA drivers under the arm64 maintainership - Fix the pkvm driver to fall back to ioremap() (and warn) if the MMIO_GUARD hypercall fails - Keep the Arm CCA driver default 'n' rather than 'm' - A series of fixes for the arm64 ptrace() implementation, potentially leading to the kernel consuming uninitialised stack variables when PTRACE_SETREGSET is invoked with a length of 0 - Fix zone_dma_limit calculation when RAM starts below 4GB and ZONE_DMA is capped to this limit - Fix early boot warning with CONFIG_DEBUG_VIRTUAL=y triggered by a call to page_to_phys() (from patch_map()) which checks pfn_valid() before vmemmap has been set up - Do not clobber bits 15:8 of the ASID used for TTBR1_EL1 and TLBI ops when the kernel assumes 8-bit ASIDs but running under a hypervisor on a system that implements 16-bit ASIDs (found running Linux under Parallels on Apple M4) - ACPI/IORT: Add PMCG platform information for HiSilicon HIP09A as it is using the same SMMU PMCG as HIP09 and suffers from the same errata - Add GCS to cpucap_is_possible(), missed in the recent merge" * tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: arm64: ptrace: fix partial SETREGSET for NT_ARM_GCS arm64: ptrace: fix partial SETREGSET for NT_ARM_POE arm64: ptrace: fix partial SETREGSET for NT_ARM_FPMR arm64: ptrace: fix partial SETREGSET for NT_ARM_TAGGED_ADDR_CTRL arm64: cpufeature: Add GCS to cpucap_is_possible() coco: virt: arm64: Do not enable cca guest driver by default arm64: mte: Fix copy_highpage() warning on hugetlb folios arm64: Ensure bits ASID[15:8] are masked out when the kernel uses 8-bit ASIDs ACPI/IORT: Add PMCG platform information for HiSilicon HIP09A MAINTAINERS: Add CCA and pKVM CoCO guest support to the ARM64 entry drivers/virt: pkvm: Don't fail ioremap() call if MMIO_GUARD fails arm64: patching: avoid early page_to_phys() arm64: mm: Fix zone_dma_limit calculation arm64: mte: set VM_MTE_ALLOWED for hugetlbfs at correct place
This commit is contained in:
commit
f3ddc438a2
@ -255,8 +255,9 @@ stable kernels.
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+----------------+-----------------+-----------------+-----------------------------+
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| Hisilicon | Hip08 SMMU PMCG | #162001800 | N/A |
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+----------------+-----------------+-----------------+-----------------------------+
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| Hisilicon | Hip{08,09,10,10C| #162001900 | N/A |
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| | ,11} SMMU PMCG | | |
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| Hisilicon | Hip{08,09,09A,10| #162001900 | N/A |
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| | ,10C,11} | | |
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| | SMMU PMCG | | |
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+----------------+-----------------+-----------------+-----------------------------+
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| Hisilicon | Hip09 | #162100801 | HISILICON_ERRATUM_162100801 |
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+----------------+-----------------+-----------------+-----------------------------+
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@ -3376,6 +3376,8 @@ S: Maintained
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T: git git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux.git
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F: Documentation/arch/arm64/
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F: arch/arm64/
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F: drivers/virt/coco/arm-cca-guest/
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F: drivers/virt/coco/pkvm-guest/
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F: tools/testing/selftests/arm64/
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X: arch/arm64/boot/dts/
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@ -44,6 +44,8 @@ cpucap_is_possible(const unsigned int cap)
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return IS_ENABLED(CONFIG_ARM64_TLB_RANGE);
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case ARM64_HAS_S1POE:
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return IS_ENABLED(CONFIG_ARM64_POE);
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case ARM64_HAS_GCS:
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return IS_ENABLED(CONFIG_ARM64_GCS);
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case ARM64_UNMAP_KERNEL_AT_EL0:
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return IS_ENABLED(CONFIG_UNMAP_KERNEL_AT_EL0);
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case ARM64_WORKAROUND_843419:
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@ -847,8 +847,7 @@ static inline bool system_supports_poe(void)
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static inline bool system_supports_gcs(void)
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{
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return IS_ENABLED(CONFIG_ARM64_GCS) &&
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alternative_has_cap_unlikely(ARM64_HAS_GCS);
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return alternative_has_cap_unlikely(ARM64_HAS_GCS);
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}
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static inline bool system_supports_haft(void)
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@ -7,6 +7,7 @@
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#ifndef BUILD_VDSO
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#include <linux/compiler.h>
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#include <linux/fs.h>
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#include <linux/hugetlb.h>
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#include <linux/shmem_fs.h>
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#include <linux/types.h>
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@ -44,7 +45,7 @@ static inline unsigned long arch_calc_vm_flag_bits(struct file *file,
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if (system_supports_mte()) {
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if (flags & (MAP_ANONYMOUS | MAP_HUGETLB))
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return VM_MTE_ALLOWED;
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if (shmem_file(file))
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if (shmem_file(file) || is_file_hugepages(file))
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return VM_MTE_ALLOWED;
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}
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@ -30,20 +30,17 @@ static bool is_image_text(unsigned long addr)
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static void __kprobes *patch_map(void *addr, int fixmap)
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{
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unsigned long uintaddr = (uintptr_t) addr;
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bool image = is_image_text(uintaddr);
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struct page *page;
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phys_addr_t phys;
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if (image)
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page = phys_to_page(__pa_symbol(addr));
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else if (IS_ENABLED(CONFIG_EXECMEM))
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page = vmalloc_to_page(addr);
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else
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return addr;
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if (is_image_text((unsigned long)addr)) {
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phys = __pa_symbol(addr);
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} else {
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struct page *page = vmalloc_to_page(addr);
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BUG_ON(!page);
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phys = page_to_phys(page) + offset_in_page(addr);
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}
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BUG_ON(!page);
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return (void *)set_fixmap_offset(fixmap, page_to_phys(page) +
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(uintaddr & ~PAGE_MASK));
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return (void *)set_fixmap_offset(fixmap, phys);
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}
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static void __kprobes patch_unmap(int fixmap)
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@ -720,6 +720,8 @@ static int fpmr_set(struct task_struct *target, const struct user_regset *regset
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if (!system_supports_fpmr())
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return -EINVAL;
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fpmr = target->thread.uw.fpmr;
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ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &fpmr, 0, count);
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if (ret)
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return ret;
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@ -1427,7 +1429,7 @@ static int tagged_addr_ctrl_get(struct task_struct *target,
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{
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long ctrl = get_tagged_addr_ctrl(target);
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if (IS_ERR_VALUE(ctrl))
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if (WARN_ON_ONCE(IS_ERR_VALUE(ctrl)))
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return ctrl;
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return membuf_write(&to, &ctrl, sizeof(ctrl));
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@ -1441,6 +1443,10 @@ static int tagged_addr_ctrl_set(struct task_struct *target, const struct
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int ret;
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long ctrl;
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ctrl = get_tagged_addr_ctrl(target);
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if (WARN_ON_ONCE(IS_ERR_VALUE(ctrl)))
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return ctrl;
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ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &ctrl, 0, -1);
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if (ret)
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return ret;
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@ -1472,6 +1478,8 @@ static int poe_set(struct task_struct *target, const struct
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if (!system_supports_poe())
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return -EINVAL;
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ctrl = target->thread.por_el0;
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ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &ctrl, 0, -1);
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if (ret)
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return ret;
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@ -1483,6 +1491,22 @@ static int poe_set(struct task_struct *target, const struct
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#endif
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#ifdef CONFIG_ARM64_GCS
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static void task_gcs_to_user(struct user_gcs *user_gcs,
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const struct task_struct *target)
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{
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user_gcs->features_enabled = target->thread.gcs_el0_mode;
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user_gcs->features_locked = target->thread.gcs_el0_locked;
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user_gcs->gcspr_el0 = target->thread.gcspr_el0;
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}
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static void task_gcs_from_user(struct task_struct *target,
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const struct user_gcs *user_gcs)
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{
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target->thread.gcs_el0_mode = user_gcs->features_enabled;
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target->thread.gcs_el0_locked = user_gcs->features_locked;
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target->thread.gcspr_el0 = user_gcs->gcspr_el0;
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}
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static int gcs_get(struct task_struct *target,
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const struct user_regset *regset,
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struct membuf to)
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@ -1495,9 +1519,7 @@ static int gcs_get(struct task_struct *target,
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if (target == current)
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gcs_preserve_current_state();
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user_gcs.features_enabled = target->thread.gcs_el0_mode;
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user_gcs.features_locked = target->thread.gcs_el0_locked;
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user_gcs.gcspr_el0 = target->thread.gcspr_el0;
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task_gcs_to_user(&user_gcs, target);
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return membuf_write(&to, &user_gcs, sizeof(user_gcs));
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}
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@ -1513,6 +1535,8 @@ static int gcs_set(struct task_struct *target, const struct
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if (!system_supports_gcs())
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return -EINVAL;
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task_gcs_to_user(&user_gcs, target);
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ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &user_gcs, 0, -1);
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if (ret)
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return ret;
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@ -1520,9 +1544,7 @@ static int gcs_set(struct task_struct *target, const struct
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if (user_gcs.features_enabled & ~PR_SHADOW_STACK_SUPPORTED_STATUS_MASK)
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return -EINVAL;
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target->thread.gcs_el0_mode = user_gcs.features_enabled;
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target->thread.gcs_el0_locked = user_gcs.features_locked;
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target->thread.gcspr_el0 = user_gcs.gcspr_el0;
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task_gcs_from_user(target, &user_gcs);
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return 0;
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}
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@ -32,9 +32,9 @@ static unsigned long nr_pinned_asids;
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static unsigned long *pinned_asid_map;
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#define ASID_MASK (~GENMASK(asid_bits - 1, 0))
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#define ASID_FIRST_VERSION (1UL << asid_bits)
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#define ASID_FIRST_VERSION (1UL << 16)
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#define NUM_USER_ASIDS ASID_FIRST_VERSION
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#define NUM_USER_ASIDS (1UL << asid_bits)
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#define ctxid2asid(asid) ((asid) & ~ASID_MASK)
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#define asid2ctxid(asid, genid) ((asid) | (genid))
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@ -30,11 +30,13 @@ void copy_highpage(struct page *to, struct page *from)
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if (!system_supports_mte())
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return;
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if (folio_test_hugetlb(src) &&
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folio_test_hugetlb_mte_tagged(src)) {
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if (!folio_try_hugetlb_mte_tagging(dst))
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if (folio_test_hugetlb(src)) {
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if (!folio_test_hugetlb_mte_tagged(src) ||
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from != folio_page(src, 0))
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return;
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WARN_ON_ONCE(!folio_try_hugetlb_mte_tagging(dst));
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/*
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* Populate tags for all subpages.
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*
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@ -117,15 +117,6 @@ static void __init arch_reserve_crashkernel(void)
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static phys_addr_t __init max_zone_phys(phys_addr_t zone_limit)
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{
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/**
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* Information we get from firmware (e.g. DT dma-ranges) describe DMA
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* bus constraints. Devices using DMA might have their own limitations.
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* Some of them rely on DMA zone in low 32-bit memory. Keep low RAM
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* DMA zone on platforms that have RAM there.
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*/
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if (memblock_start_of_DRAM() < U32_MAX)
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zone_limit = min(zone_limit, U32_MAX);
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return min(zone_limit, memblock_end_of_DRAM() - 1) + 1;
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}
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@ -141,6 +132,14 @@ static void __init zone_sizes_init(void)
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acpi_zone_dma_limit = acpi_iort_dma_get_max_cpu_address();
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dt_zone_dma_limit = of_dma_get_max_cpu_address(NULL);
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zone_dma_limit = min(dt_zone_dma_limit, acpi_zone_dma_limit);
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/*
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* Information we get from firmware (e.g. DT dma-ranges) describe DMA
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* bus constraints. Devices using DMA might have their own limitations.
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* Some of them rely on DMA zone in low 32-bit memory. Keep low RAM
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* DMA zone on platforms that have RAM there.
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*/
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if (memblock_start_of_DRAM() < U32_MAX)
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zone_dma_limit = min(zone_dma_limit, U32_MAX);
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arm64_dma_phys_limit = max_zone_phys(zone_dma_limit);
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max_zone_pfns[ZONE_DMA] = PFN_DOWN(arm64_dma_phys_limit);
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#endif
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@ -1716,6 +1716,8 @@ static struct acpi_platform_list pmcg_plat_info[] __initdata = {
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/* HiSilicon Hip09 Platform */
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{"HISI ", "HIP09 ", 0, ACPI_SIG_IORT, greater_than_or_equal,
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"Erratum #162001900", IORT_SMMU_V3_PMCG_HISI_HIP09},
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{"HISI ", "HIP09A ", 0, ACPI_SIG_IORT, greater_than_or_equal,
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"Erratum #162001900", IORT_SMMU_V3_PMCG_HISI_HIP09},
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/* HiSilicon Hip10/11 Platform uses the same SMMU IP with Hip09 */
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{"HISI ", "HIP10 ", 0, ACPI_SIG_IORT, greater_than_or_equal,
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"Erratum #162001900", IORT_SMMU_V3_PMCG_HISI_HIP09},
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@ -1,7 +1,6 @@
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config ARM_CCA_GUEST
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tristate "Arm CCA Guest driver"
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depends on ARM64
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default m
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select TSM_REPORTS
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help
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The driver provides userspace interface to request and
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@ -87,12 +87,8 @@ static int mmio_guard_ioremap_hook(phys_addr_t phys, size_t size,
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while (phys < end) {
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const int func_id = ARM_SMCCC_VENDOR_HYP_KVM_MMIO_GUARD_FUNC_ID;
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int err;
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err = arm_smccc_do_one_page(func_id, phys);
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if (err)
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return err;
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WARN_ON_ONCE(arm_smccc_do_one_page(func_id, phys));
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phys += PAGE_SIZE;
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}
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@ -113,7 +113,7 @@ static int hugetlbfs_file_mmap(struct file *file, struct vm_area_struct *vma)
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* way when do_mmap unwinds (may be important on powerpc
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* and ia64).
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*/
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vm_flags_set(vma, VM_HUGETLB | VM_DONTEXPAND | VM_MTE_ALLOWED);
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vm_flags_set(vma, VM_HUGETLB | VM_DONTEXPAND);
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vma->vm_ops = &hugetlb_vm_ops;
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ret = seal_check_write(info->seals, vma);
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