mirror of
https://github.com/torvalds/linux.git
synced 2024-11-23 12:42:02 +00:00
Merge branch 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc
* 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc:
[POWERPC] macintosh: Replace deprecated __initcall with device_initcall
[POWERPC] cell: Fix section mismatches in io-workarounds code
[POWERPC] spufs: Fix compile error
[POWERPC] Fix uninitialized variable bug in copy_{to|from}_user
[POWERPC] Add null pointer check to of_find_property
[POWERPC] vmemmap fixes to use smaller pages
[POWERPC] spufs: Fix pointer reference in find_victim
[POWERPC] 85xx: SBC8548 - Add flash support and HW Rev reporting
[POWERPC] 85xx: Fix some sparse warnings for 85xx MDS
[POWERPC] 83xx: Enable DMA engine on the MPC8377 MDS board.
[POWERPC] 86xx: mpc8610_hpcd: fix second serial port
[POWERPC] 86xx: mpc8610_hpcd: add support for NOR and NAND flashes
[POWERPC] 85xx: Add 8568 PHY workarounds to board code
[POWERPC] 86xx: mpc8610_hpcd: use ULI526X driver for on-board ethernet
This commit is contained in:
Linus Torvalds
commit
f26a398891
@ -268,6 +268,33 @@
|
||||
interrupt-parent = <&ipic>;
|
||||
};
|
||||
|
||||
dma@82a8 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,mpc8349-dma";
|
||||
reg = <0x82a8 4>;
|
||||
ranges = <0 0x8100 0x1a8>;
|
||||
interrupt-parent = <&ipic>;
|
||||
interrupts = <0x47 8>;
|
||||
cell-index = <0>;
|
||||
dma-channel@0 {
|
||||
compatible = "fsl,mpc8349-dma-channel";
|
||||
reg = <0 0x80>;
|
||||
};
|
||||
dma-channel@80 {
|
||||
compatible = "fsl,mpc8349-dma-channel";
|
||||
reg = <0x80 0x80>;
|
||||
};
|
||||
dma-channel@100 {
|
||||
compatible = "fsl,mpc8349-dma-channel";
|
||||
reg = <0x100 0x80>;
|
||||
};
|
||||
dma-channel@180 {
|
||||
compatible = "fsl,mpc8349-dma-channel";
|
||||
reg = <0x180 0x28>;
|
||||
};
|
||||
};
|
||||
|
||||
/* IPIC
|
||||
* interrupts cell = <intr #, sense>
|
||||
* sense values match linux IORESOURCE_IRQ_* defines:
|
||||
|
||||
@ -46,9 +46,63 @@
|
||||
reg = <0x00000000 0x20000000>; // 512M at 0x0
|
||||
};
|
||||
|
||||
board-control@e8000000 {
|
||||
compatible = "fsl,fpga-pixis";
|
||||
reg = <0xe8000000 32>; // pixis at 0xe8000000
|
||||
localbus@e0005000 {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,mpc8610-elbc", "fsl,elbc", "simple-bus";
|
||||
reg = <0xe0005000 0x1000>;
|
||||
interrupts = <19 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
ranges = <0 0 0xf8000000 0x08000000
|
||||
1 0 0xf0000000 0x08000000
|
||||
2 0 0xe8400000 0x00008000
|
||||
4 0 0xe8440000 0x00008000
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||||
5 0 0xe8480000 0x00008000
|
||||
6 0 0xe84c0000 0x00008000
|
||||
3 0 0xe8000000 0x00000020>;
|
||||
|
||||
flash@0,0 {
|
||||
compatible = "cfi-flash";
|
||||
reg = <0 0 0x8000000>;
|
||||
bank-width = <2>;
|
||||
device-width = <1>;
|
||||
};
|
||||
|
||||
flash@1,0 {
|
||||
compatible = "cfi-flash";
|
||||
reg = <1 0 0x8000000>;
|
||||
bank-width = <2>;
|
||||
device-width = <1>;
|
||||
};
|
||||
|
||||
flash@2,0 {
|
||||
compatible = "fsl,mpc8610-fcm-nand",
|
||||
"fsl,elbc-fcm-nand";
|
||||
reg = <2 0 0x8000>;
|
||||
};
|
||||
|
||||
flash@4,0 {
|
||||
compatible = "fsl,mpc8610-fcm-nand",
|
||||
"fsl,elbc-fcm-nand";
|
||||
reg = <4 0 0x8000>;
|
||||
};
|
||||
|
||||
flash@5,0 {
|
||||
compatible = "fsl,mpc8610-fcm-nand",
|
||||
"fsl,elbc-fcm-nand";
|
||||
reg = <5 0 0x8000>;
|
||||
};
|
||||
|
||||
flash@6,0 {
|
||||
compatible = "fsl,mpc8610-fcm-nand",
|
||||
"fsl,elbc-fcm-nand";
|
||||
reg = <6 0 0x8000>;
|
||||
};
|
||||
|
||||
board-control@3,0 {
|
||||
compatible = "fsl,fpga-pixis";
|
||||
reg = <3 0 0x20>;
|
||||
};
|
||||
};
|
||||
|
||||
soc@e0000000 {
|
||||
|
||||
@ -52,6 +52,99 @@
|
||||
reg = <0x00000000 0x10000000>;
|
||||
};
|
||||
|
||||
localbus@e0000000 {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
compatible = "simple-bus";
|
||||
reg = <0xe0000000 0x5000>;
|
||||
interrupt-parent = <&mpic>;
|
||||
|
||||
ranges = <0x0 0x0 0xff800000 0x00800000 /*8MB Flash*/
|
||||
0x3 0x0 0xf0000000 0x04000000 /*64MB SDRAM*/
|
||||
0x4 0x0 0xf4000000 0x04000000 /*64MB SDRAM*/
|
||||
0x5 0x0 0xf8000000 0x00b10000 /* EPLD */
|
||||
0x6 0x0 0xfb800000 0x04000000>; /*64MB Flash*/
|
||||
|
||||
|
||||
flash@0,0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "cfi-flash";
|
||||
reg = <0x0 0x0 0x800000>;
|
||||
bank-width = <1>;
|
||||
device-width = <1>;
|
||||
partition@0x0 {
|
||||
label = "space";
|
||||
reg = <0x00000000 0x00100000>;
|
||||
};
|
||||
partition@0x100000 {
|
||||
label = "bootloader";
|
||||
reg = <0x00100000 0x00700000>;
|
||||
read-only;
|
||||
};
|
||||
};
|
||||
|
||||
epld@5,0 {
|
||||
compatible = "wrs,epld-localbus";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
reg = <0x5 0x0 0x00b10000>;
|
||||
ranges = <
|
||||
0x0 0x0 0x5 0x000000 0x1fff /* LED */
|
||||
0x1 0x0 0x5 0x100000 0x1fff /* Switches */
|
||||
0x3 0x0 0x5 0x300000 0x1fff /* HW Rev. */
|
||||
0xb 0x0 0x5 0xb00000 0x1fff /* EEPROM */
|
||||
>;
|
||||
|
||||
led@0,0 {
|
||||
compatible = "led";
|
||||
reg = <0x0 0x0 0x1fff>;
|
||||
};
|
||||
|
||||
switches@1,0 {
|
||||
compatible = "switches";
|
||||
reg = <0x1 0x0 0x1fff>;
|
||||
};
|
||||
|
||||
hw-rev@3,0 {
|
||||
compatible = "hw-rev";
|
||||
reg = <0x3 0x0 0x1fff>;
|
||||
};
|
||||
|
||||
eeprom@b,0 {
|
||||
compatible = "eeprom";
|
||||
reg = <0xb 0 0x1fff>;
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
alt-flash@6,0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0x6 0x0 0x04000000>;
|
||||
compatible = "cfi-flash";
|
||||
bank-width = <4>;
|
||||
device-width = <1>;
|
||||
partition@0x0 {
|
||||
label = "bootloader";
|
||||
reg = <0x00000000 0x00100000>;
|
||||
read-only;
|
||||
};
|
||||
partition@0x00100000 {
|
||||
label = "file-system";
|
||||
reg = <0x00100000 0x01f00000>;
|
||||
};
|
||||
partition@0x02000000 {
|
||||
label = "boot-config";
|
||||
reg = <0x02000000 0x00100000>;
|
||||
};
|
||||
partition@0x02100000 {
|
||||
label = "space";
|
||||
reg = <0x02100000 0x01f00000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
soc8548@e0000000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
@ -59,6 +152,7 @@
|
||||
ranges = <0x00000000 0xe0000000 0x00100000>;
|
||||
reg = <0xe0000000 0x00001000>; // CCSRBAR
|
||||
bus-frequency = <0>;
|
||||
compatible = "simple-bus";
|
||||
|
||||
memory-controller@2000 {
|
||||
compatible = "fsl,8548-memory-controller";
|
||||
|
||||
@ -358,7 +358,93 @@ CONFIG_FW_LOADER=y
|
||||
# CONFIG_DEBUG_DEVRES is not set
|
||||
# CONFIG_SYS_HYPERVISOR is not set
|
||||
# CONFIG_CONNECTOR is not set
|
||||
# CONFIG_MTD is not set
|
||||
CONFIG_MTD=y
|
||||
# CONFIG_MTD_DEBUG is not set
|
||||
# CONFIG_MTD_CONCAT is not set
|
||||
CONFIG_MTD_PARTITIONS=y
|
||||
# CONFIG_MTD_REDBOOT_PARTS is not set
|
||||
CONFIG_MTD_CMDLINE_PARTS=y
|
||||
# CONFIG_MTD_OF_PARTS is not set
|
||||
# CONFIG_MTD_AR7_PARTS is not set
|
||||
|
||||
#
|
||||
# User Modules And Translation Layers
|
||||
#
|
||||
CONFIG_MTD_CHAR=y
|
||||
CONFIG_MTD_BLKDEVS=y
|
||||
CONFIG_MTD_BLOCK=y
|
||||
# CONFIG_FTL is not set
|
||||
# CONFIG_NFTL is not set
|
||||
# CONFIG_INFTL is not set
|
||||
# CONFIG_RFD_FTL is not set
|
||||
# CONFIG_SSFDC is not set
|
||||
# CONFIG_MTD_OOPS is not set
|
||||
|
||||
#
|
||||
# RAM/ROM/Flash chip drivers
|
||||
#
|
||||
CONFIG_MTD_CFI=y
|
||||
# CONFIG_MTD_JEDECPROBE is not set
|
||||
CONFIG_MTD_GEN_PROBE=y
|
||||
# CONFIG_MTD_CFI_ADV_OPTIONS is not set
|
||||
CONFIG_MTD_MAP_BANK_WIDTH_1=y
|
||||
CONFIG_MTD_MAP_BANK_WIDTH_2=y
|
||||
CONFIG_MTD_MAP_BANK_WIDTH_4=y
|
||||
# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
|
||||
# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
|
||||
# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
|
||||
CONFIG_MTD_CFI_I1=y
|
||||
CONFIG_MTD_CFI_I2=y
|
||||
# CONFIG_MTD_CFI_I4 is not set
|
||||
# CONFIG_MTD_CFI_I8 is not set
|
||||
# CONFIG_MTD_CFI_INTELEXT is not set
|
||||
CONFIG_MTD_CFI_AMDSTD=y
|
||||
# CONFIG_MTD_CFI_STAA is not set
|
||||
CONFIG_MTD_CFI_UTIL=y
|
||||
# CONFIG_MTD_RAM is not set
|
||||
# CONFIG_MTD_ROM is not set
|
||||
# CONFIG_MTD_ABSENT is not set
|
||||
|
||||
#
|
||||
# Mapping drivers for chip access
|
||||
#
|
||||
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
|
||||
# CONFIG_MTD_PHYSMAP is not set
|
||||
CONFIG_MTD_PHYSMAP_OF=y
|
||||
# CONFIG_MTD_INTEL_VR_NOR is not set
|
||||
# CONFIG_MTD_PLATRAM is not set
|
||||
|
||||
#
|
||||
# Self-contained MTD device drivers
|
||||
#
|
||||
# CONFIG_MTD_PMC551 is not set
|
||||
# CONFIG_MTD_SLRAM is not set
|
||||
# CONFIG_MTD_PHRAM is not set
|
||||
# CONFIG_MTD_MTDRAM is not set
|
||||
# CONFIG_MTD_BLOCK2MTD is not set
|
||||
|
||||
#
|
||||
# Disk-On-Chip Device Drivers
|
||||
#
|
||||
# CONFIG_MTD_DOC2000 is not set
|
||||
# CONFIG_MTD_DOC2001 is not set
|
||||
# CONFIG_MTD_DOC2001PLUS is not set
|
||||
CONFIG_MTD_NAND=y
|
||||
# CONFIG_MTD_NAND_VERIFY_WRITE is not set
|
||||
# CONFIG_MTD_NAND_ECC_SMC is not set
|
||||
# CONFIG_MTD_NAND_MUSEUM_IDS is not set
|
||||
CONFIG_MTD_NAND_IDS=y
|
||||
# CONFIG_MTD_NAND_DISKONCHIP is not set
|
||||
# CONFIG_MTD_NAND_CAFE is not set
|
||||
# CONFIG_MTD_NAND_NANDSIM is not set
|
||||
# CONFIG_MTD_NAND_PLATFORM is not set
|
||||
CONFIG_MTD_NAND_FSL_ELBC=y
|
||||
# CONFIG_MTD_ONENAND is not set
|
||||
|
||||
#
|
||||
# UBI - Unsorted block images
|
||||
#
|
||||
# CONFIG_MTD_UBI is not set
|
||||
CONFIG_OF_DEVICE=y
|
||||
# CONFIG_PARPORT is not set
|
||||
CONFIG_BLK_DEV=y
|
||||
@ -567,14 +653,11 @@ CONFIG_MII=y
|
||||
# CONFIG_NET_VENDOR_3COM is not set
|
||||
CONFIG_NET_TULIP=y
|
||||
# CONFIG_DE2104X is not set
|
||||
CONFIG_TULIP=y
|
||||
# CONFIG_TULIP_MWI is not set
|
||||
CONFIG_TULIP_MMIO=y
|
||||
# CONFIG_TULIP_NAPI is not set
|
||||
# CONFIG_TULIP is not set
|
||||
# CONFIG_DE4X5 is not set
|
||||
# CONFIG_WINBOND_840 is not set
|
||||
# CONFIG_DM9102 is not set
|
||||
# CONFIG_ULI526X is not set
|
||||
CONFIG_ULI526X=y
|
||||
# CONFIG_HP100 is not set
|
||||
# CONFIG_IBM_NEW_EMAC_ZMII is not set
|
||||
# CONFIG_IBM_NEW_EMAC_RGMII is not set
|
||||
|
||||
@ -94,6 +94,9 @@ unsigned long htab_hash_mask;
|
||||
int mmu_linear_psize = MMU_PAGE_4K;
|
||||
int mmu_virtual_psize = MMU_PAGE_4K;
|
||||
int mmu_vmalloc_psize = MMU_PAGE_4K;
|
||||
#ifdef CONFIG_SPARSEMEM_VMEMMAP
|
||||
int mmu_vmemmap_psize = MMU_PAGE_4K;
|
||||
#endif
|
||||
int mmu_io_psize = MMU_PAGE_4K;
|
||||
int mmu_kernel_ssize = MMU_SEGSIZE_256M;
|
||||
int mmu_highuser_ssize = MMU_SEGSIZE_256M;
|
||||
@ -387,11 +390,32 @@ static void __init htab_init_page_sizes(void)
|
||||
}
|
||||
#endif /* CONFIG_PPC_64K_PAGES */
|
||||
|
||||
#ifdef CONFIG_SPARSEMEM_VMEMMAP
|
||||
/* We try to use 16M pages for vmemmap if that is supported
|
||||
* and we have at least 1G of RAM at boot
|
||||
*/
|
||||
if (mmu_psize_defs[MMU_PAGE_16M].shift &&
|
||||
lmb_phys_mem_size() >= 0x40000000)
|
||||
mmu_vmemmap_psize = MMU_PAGE_16M;
|
||||
else if (mmu_psize_defs[MMU_PAGE_64K].shift)
|
||||
mmu_vmemmap_psize = MMU_PAGE_64K;
|
||||
else
|
||||
mmu_vmemmap_psize = MMU_PAGE_4K;
|
||||
#endif /* CONFIG_SPARSEMEM_VMEMMAP */
|
||||
|
||||
printk(KERN_DEBUG "Page orders: linear mapping = %d, "
|
||||
"virtual = %d, io = %d\n",
|
||||
"virtual = %d, io = %d"
|
||||
#ifdef CONFIG_SPARSEMEM_VMEMMAP
|
||||
", vmemmap = %d"
|
||||
#endif
|
||||
"\n",
|
||||
mmu_psize_defs[mmu_linear_psize].shift,
|
||||
mmu_psize_defs[mmu_virtual_psize].shift,
|
||||
mmu_psize_defs[mmu_io_psize].shift);
|
||||
mmu_psize_defs[mmu_io_psize].shift
|
||||
#ifdef CONFIG_SPARSEMEM_VMEMMAP
|
||||
,mmu_psize_defs[mmu_vmemmap_psize].shift
|
||||
#endif
|
||||
);
|
||||
|
||||
#ifdef CONFIG_HUGETLB_PAGE
|
||||
/* Init large page size. Currently, we pick 16M or 1M depending
|
||||
|
||||
@ -19,6 +19,8 @@
|
||||
*
|
||||
*/
|
||||
|
||||
#undef DEBUG
|
||||
|
||||
#include <linux/signal.h>
|
||||
#include <linux/sched.h>
|
||||
#include <linux/kernel.h>
|
||||
@ -208,12 +210,12 @@ int __meminit vmemmap_populated(unsigned long start, int page_size)
|
||||
}
|
||||
|
||||
int __meminit vmemmap_populate(struct page *start_page,
|
||||
unsigned long nr_pages, int node)
|
||||
unsigned long nr_pages, int node)
|
||||
{
|
||||
unsigned long mode_rw;
|
||||
unsigned long start = (unsigned long)start_page;
|
||||
unsigned long end = (unsigned long)(start_page + nr_pages);
|
||||
unsigned long page_size = 1 << mmu_psize_defs[mmu_linear_psize].shift;
|
||||
unsigned long page_size = 1 << mmu_psize_defs[mmu_vmemmap_psize].shift;
|
||||
|
||||
mode_rw = _PAGE_ACCESSED | _PAGE_DIRTY | _PAGE_COHERENT | PP_RWXX;
|
||||
|
||||
@ -235,11 +237,11 @@ int __meminit vmemmap_populate(struct page *start_page,
|
||||
start, p, __pa(p));
|
||||
|
||||
mapped = htab_bolt_mapping(start, start + page_size,
|
||||
__pa(p), mode_rw, mmu_linear_psize,
|
||||
__pa(p), mode_rw, mmu_vmemmap_psize,
|
||||
mmu_kernel_ssize);
|
||||
BUG_ON(mapped < 0);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
#endif /* CONFIG_SPARSEMEM_VMEMMAP */
|
||||
|
||||
@ -28,7 +28,7 @@
|
||||
#include <asm/udbg.h>
|
||||
|
||||
#ifdef DEBUG
|
||||
#define DBG(fmt...) udbg_printf(fmt)
|
||||
#define DBG(fmt...) printk(fmt)
|
||||
#else
|
||||
#define DBG pr_debug
|
||||
#endif
|
||||
@ -263,13 +263,19 @@ void slb_initialize(void)
|
||||
extern unsigned int *slb_miss_kernel_load_linear;
|
||||
extern unsigned int *slb_miss_kernel_load_io;
|
||||
extern unsigned int *slb_compare_rr_to_size;
|
||||
#ifdef CONFIG_SPARSEMEM_VMEMMAP
|
||||
extern unsigned int *slb_miss_kernel_load_vmemmap;
|
||||
unsigned long vmemmap_llp;
|
||||
#endif
|
||||
|
||||
/* Prepare our SLB miss handler based on our page size */
|
||||
linear_llp = mmu_psize_defs[mmu_linear_psize].sllp;
|
||||
io_llp = mmu_psize_defs[mmu_io_psize].sllp;
|
||||
vmalloc_llp = mmu_psize_defs[mmu_vmalloc_psize].sllp;
|
||||
get_paca()->vmalloc_sllp = SLB_VSID_KERNEL | vmalloc_llp;
|
||||
|
||||
#ifdef CONFIG_SPARSEMEM_VMEMMAP
|
||||
vmemmap_llp = mmu_psize_defs[mmu_vmemmap_psize].sllp;
|
||||
#endif
|
||||
if (!slb_encoding_inited) {
|
||||
slb_encoding_inited = 1;
|
||||
patch_slb_encoding(slb_miss_kernel_load_linear,
|
||||
@ -281,6 +287,12 @@ void slb_initialize(void)
|
||||
|
||||
DBG("SLB: linear LLP = %04lx\n", linear_llp);
|
||||
DBG("SLB: io LLP = %04lx\n", io_llp);
|
||||
|
||||
#ifdef CONFIG_SPARSEMEM_VMEMMAP
|
||||
patch_slb_encoding(slb_miss_kernel_load_vmemmap,
|
||||
SLB_VSID_KERNEL | vmemmap_llp);
|
||||
DBG("SLB: vmemmap LLP = %04lx\n", vmemmap_llp);
|
||||
#endif
|
||||
}
|
||||
|
||||
get_paca()->stab_rr = SLB_NUM_BOLTED;
|
||||
|
||||
@ -47,8 +47,7 @@ _GLOBAL(slb_allocate_realmode)
|
||||
* it to VSID 0, which is reserved as a bad VSID - one which
|
||||
* will never have any pages in it. */
|
||||
|
||||
/* Check if hitting the linear mapping of the vmalloc/ioremap
|
||||
* kernel space
|
||||
/* Check if hitting the linear mapping or some other kernel space
|
||||
*/
|
||||
bne cr7,1f
|
||||
|
||||
@ -62,7 +61,18 @@ BEGIN_FTR_SECTION
|
||||
END_FTR_SECTION_IFCLR(CPU_FTR_1T_SEGMENT)
|
||||
b slb_finish_load_1T
|
||||
|
||||
1: /* vmalloc/ioremap mapping encoding bits, the "li" instructions below
|
||||
1:
|
||||
#ifdef CONFIG_SPARSEMEM_VMEMMAP
|
||||
/* Check virtual memmap region. To be patches at kernel boot */
|
||||
cmpldi cr0,r9,0xf
|
||||
bne 1f
|
||||
_GLOBAL(slb_miss_kernel_load_vmemmap)
|
||||
li r11,0
|
||||
b 6f
|
||||
1:
|
||||
#endif /* CONFIG_SPARSEMEM_VMEMMAP */
|
||||
|
||||
/* vmalloc/ioremap mapping encoding bits, the "li" instructions below
|
||||
* will be patched by the kernel at boot
|
||||
*/
|
||||
BEGIN_FTR_SECTION
|
||||
|
||||
@ -32,6 +32,7 @@
|
||||
#include <linux/fsl_devices.h>
|
||||
#include <linux/of_platform.h>
|
||||
#include <linux/of_device.h>
|
||||
#include <linux/phy.h>
|
||||
|
||||
#include <asm/system.h>
|
||||
#include <asm/atomic.h>
|
||||
@ -56,6 +57,95 @@
|
||||
#define DBG(fmt...)
|
||||
#endif
|
||||
|
||||
#define MV88E1111_SCR 0x10
|
||||
#define MV88E1111_SCR_125CLK 0x0010
|
||||
static int mpc8568_fixup_125_clock(struct phy_device *phydev)
|
||||
{
|
||||
int scr;
|
||||
int err;
|
||||
|
||||
/* Workaround for the 125 CLK Toggle */
|
||||
scr = phy_read(phydev, MV88E1111_SCR);
|
||||
|
||||
if (scr < 0)
|
||||
return scr;
|
||||
|
||||
err = phy_write(phydev, MV88E1111_SCR, scr & ~(MV88E1111_SCR_125CLK));
|
||||
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
err = phy_write(phydev, MII_BMCR, BMCR_RESET);
|
||||
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
scr = phy_read(phydev, MV88E1111_SCR);
|
||||
|
||||
if (scr < 0)
|
||||
return err;
|
||||
|
||||
err = phy_write(phydev, MV88E1111_SCR, scr | 0x0008);
|
||||
|
||||
return err;
|
||||
}
|
||||
|
||||
static int mpc8568_mds_phy_fixups(struct phy_device *phydev)
|
||||
{
|
||||
int temp;
|
||||
int err;
|
||||
|
||||
/* Errata */
|
||||
err = phy_write(phydev,29, 0x0006);
|
||||
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
temp = phy_read(phydev, 30);
|
||||
|
||||
if (temp < 0)
|
||||
return temp;
|
||||
|
||||
temp = (temp & (~0x8000)) | 0x4000;
|
||||
err = phy_write(phydev,30, temp);
|
||||
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
err = phy_write(phydev,29, 0x000a);
|
||||
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
temp = phy_read(phydev, 30);
|
||||
|
||||
if (temp < 0)
|
||||
return temp;
|
||||
|
||||
temp = phy_read(phydev, 30);
|
||||
|
||||
if (temp < 0)
|
||||
return temp;
|
||||
|
||||
temp &= ~0x0020;
|
||||
|
||||
err = phy_write(phydev,30,temp);
|
||||
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
/* Disable automatic MDI/MDIX selection */
|
||||
temp = phy_read(phydev, 16);
|
||||
|
||||
if (temp < 0)
|
||||
return temp;
|
||||
|
||||
temp &= ~0x0060;
|
||||
err = phy_write(phydev,16,temp);
|
||||
|
||||
return err;
|
||||
}
|
||||
|
||||
/* ************************************************************************
|
||||
*
|
||||
* Setup the architecture
|
||||
@ -64,7 +154,7 @@
|
||||
static void __init mpc85xx_mds_setup_arch(void)
|
||||
{
|
||||
struct device_node *np;
|
||||
static u8 *bcsr_regs = NULL;
|
||||
static u8 __iomem *bcsr_regs = NULL;
|
||||
|
||||
if (ppc_md.progress)
|
||||
ppc_md.progress("mpc85xx_mds_setup_arch()", 0);
|
||||
@ -138,6 +228,35 @@ static void __init mpc85xx_mds_setup_arch(void)
|
||||
#endif /* CONFIG_QUICC_ENGINE */
|
||||
}
|
||||
|
||||
|
||||
static int __init board_fixups(void)
|
||||
{
|
||||
char phy_id[BUS_ID_SIZE];
|
||||
char *compstrs[2] = {"fsl,gianfar-mdio", "fsl,ucc-mdio"};
|
||||
struct device_node *mdio;
|
||||
struct resource res;
|
||||
int i;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(compstrs); i++) {
|
||||
mdio = of_find_compatible_node(NULL, NULL, compstrs[i]);
|
||||
|
||||
of_address_to_resource(mdio, 0, &res);
|
||||
snprintf(phy_id, BUS_ID_SIZE, "%x:%02x", res.start, 1);
|
||||
|
||||
phy_register_fixup_for_id(phy_id, mpc8568_fixup_125_clock);
|
||||
phy_register_fixup_for_id(phy_id, mpc8568_mds_phy_fixups);
|
||||
|
||||
/* Register a workaround for errata */
|
||||
snprintf(phy_id, BUS_ID_SIZE, "%x:%02x", res.start, 7);
|
||||
phy_register_fixup_for_id(phy_id, mpc8568_mds_phy_fixups);
|
||||
|
||||
of_node_put(mdio);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
machine_arch_initcall(mpc85xx_mds, board_fixups);
|
||||
|
||||
static struct of_device_id mpc85xx_ids[] = {
|
||||
{ .type = "soc", },
|
||||
{ .compatible = "soc", },
|
||||
|
||||
@ -49,6 +49,8 @@
|
||||
#include <sysdev/fsl_soc.h>
|
||||
#include <sysdev/fsl_pci.h>
|
||||
|
||||
static int sbc_rev;
|
||||
|
||||
static void __init sbc8548_pic_init(void)
|
||||
{
|
||||
struct mpic *mpic;
|
||||
@ -79,6 +81,30 @@ static void __init sbc8548_pic_init(void)
|
||||
mpic_init(mpic);
|
||||
}
|
||||
|
||||
/* Extract the HW Rev from the EPLD on the board */
|
||||
static int __init sbc8548_hw_rev(void)
|
||||
{
|
||||
struct device_node *np;
|
||||
struct resource res;
|
||||
unsigned int *rev;
|
||||
int board_rev = 0;
|
||||
|
||||
np = of_find_compatible_node(NULL, NULL, "hw-rev");
|
||||
if (np == NULL) {
|
||||
printk("No HW-REV found in DTB.\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
of_address_to_resource(np, 0, &res);
|
||||
of_node_put(np);
|
||||
|
||||
rev = ioremap(res.start,sizeof(unsigned int));
|
||||
board_rev = (*rev) >> 28;
|
||||
iounmap(rev);
|
||||
|
||||
return board_rev;
|
||||
}
|
||||
|
||||
/*
|
||||
* Setup the architecture
|
||||
*/
|
||||
@ -104,6 +130,7 @@ static void __init sbc8548_setup_arch(void)
|
||||
}
|
||||
}
|
||||
#endif
|
||||
sbc_rev = sbc8548_hw_rev();
|
||||
}
|
||||
|
||||
static void sbc8548_show_cpuinfo(struct seq_file *m)
|
||||
@ -115,7 +142,7 @@ static void sbc8548_show_cpuinfo(struct seq_file *m)
|
||||
svid = mfspr(SPRN_SVR);
|
||||
|
||||
seq_printf(m, "Vendor\t\t: Wind River\n");
|
||||
seq_printf(m, "Machine\t\t: SBC8548\n");
|
||||
seq_printf(m, "Machine\t\t: SBC8548 v%d\n", sbc_rev);
|
||||
seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
|
||||
seq_printf(m, "SVR\t\t: 0x%x\n", svid);
|
||||
|
||||
@ -130,6 +157,7 @@ static void sbc8548_show_cpuinfo(struct seq_file *m)
|
||||
static struct of_device_id __initdata of_bus_ids[] = {
|
||||
{ .name = "soc", },
|
||||
{ .type = "soc", },
|
||||
{ .compatible = "simple-bus", },
|
||||
{},
|
||||
};
|
||||
|
||||
|
||||
@ -43,6 +43,7 @@ static unsigned char *pixis_bdcfg0, *pixis_arch;
|
||||
|
||||
static struct of_device_id __initdata mpc8610_ids[] = {
|
||||
{ .compatible = "fsl,mpc8610-immr", },
|
||||
{ .compatible = "simple-bus", },
|
||||
{}
|
||||
};
|
||||
|
||||
@ -216,11 +217,21 @@ void mpc8610hpcd_set_gamma_table(int monitor_port, char *gamma_table_base)
|
||||
}
|
||||
}
|
||||
|
||||
#define PX_BRDCFG0_DVISEL (1 << 3)
|
||||
#define PX_BRDCFG0_DLINK (1 << 4)
|
||||
#define PX_BRDCFG0_DIU_MASK (PX_BRDCFG0_DVISEL | PX_BRDCFG0_DLINK)
|
||||
|
||||
void mpc8610hpcd_set_monitor_port(int monitor_port)
|
||||
{
|
||||
static const u8 bdcfg[] = {0xBD, 0xB5, 0xA5};
|
||||
static const u8 bdcfg[] = {
|
||||
PX_BRDCFG0_DVISEL | PX_BRDCFG0_DLINK,
|
||||
PX_BRDCFG0_DLINK,
|
||||
0,
|
||||
};
|
||||
|
||||
if (monitor_port < 3)
|
||||
*pixis_bdcfg0 = bdcfg[monitor_port];
|
||||
clrsetbits_8(pixis_bdcfg0, PX_BRDCFG0_DIU_MASK,
|
||||
bdcfg[monitor_port]);
|
||||
}
|
||||
|
||||
void mpc8610hpcd_set_pixel_clock(unsigned int pixclock)
|
||||
|
||||
@ -118,7 +118,7 @@ static void iowa_##name at \
|
||||
#undef DEF_PCI_AC_RET
|
||||
#undef DEF_PCI_AC_NORET
|
||||
|
||||
static struct ppc_pci_io __initdata iowa_pci_io = {
|
||||
static const struct ppc_pci_io __devinitconst iowa_pci_io = {
|
||||
|
||||
#define DEF_PCI_AC_RET(name, ret, at, al, space, aa) .name = iowa_##name,
|
||||
#define DEF_PCI_AC_NORET(name, at, al, space, aa) .name = iowa_##name,
|
||||
@ -146,7 +146,7 @@ static void __iomem *iowa_ioremap(unsigned long addr, unsigned long size,
|
||||
}
|
||||
|
||||
/* Regist new bus to support workaround */
|
||||
void __init iowa_register_bus(struct pci_controller *phb,
|
||||
void __devinit iowa_register_bus(struct pci_controller *phb,
|
||||
struct ppc_pci_io *ops,
|
||||
int (*initfunc)(struct iowa_bus *, void *), void *data)
|
||||
{
|
||||
@ -173,7 +173,7 @@ void __init iowa_register_bus(struct pci_controller *phb,
|
||||
}
|
||||
|
||||
/* enable IO workaround */
|
||||
void __init io_workaround_init(void)
|
||||
void __devinit io_workaround_init(void)
|
||||
{
|
||||
static int io_workaround_inited;
|
||||
|
||||
|
||||
@ -31,9 +31,9 @@ struct iowa_bus {
|
||||
void *private;
|
||||
};
|
||||
|
||||
void __init io_workaround_init(void);
|
||||
void __init iowa_register_bus(struct pci_controller *, struct ppc_pci_io *,
|
||||
int (*)(struct iowa_bus *, void *), void *);
|
||||
void __devinit io_workaround_init(void);
|
||||
void __devinit iowa_register_bus(struct pci_controller *, struct ppc_pci_io *,
|
||||
int (*)(struct iowa_bus *, void *), void *);
|
||||
struct iowa_bus *iowa_mem_find_bus(const PCI_IO_ADDR);
|
||||
struct iowa_bus *iowa_pio_find_bus(unsigned long);
|
||||
|
||||
|
||||
@ -32,6 +32,7 @@
|
||||
#include <linux/marker.h>
|
||||
|
||||
#include <asm/io.h>
|
||||
#include <asm/time.h>
|
||||
#include <asm/spu.h>
|
||||
#include <asm/spu_info.h>
|
||||
#include <asm/uaccess.h>
|
||||
|
||||
@ -659,7 +659,7 @@ static struct spu *find_victim(struct spu_context *ctx)
|
||||
|
||||
victim->stats.invol_ctx_switch++;
|
||||
spu->stats.invol_ctx_switch++;
|
||||
if (test_bit(SPU_SCHED_SPU_RUN, &ctx->sched_flags))
|
||||
if (test_bit(SPU_SCHED_SPU_RUN, &victim->sched_flags))
|
||||
spu_add_to_rq(victim);
|
||||
|
||||
mutex_unlock(&victim->state_mutex);
|
||||
|
||||
@ -334,7 +334,7 @@ int __init adb_init(void)
|
||||
return 0;
|
||||
}
|
||||
|
||||
__initcall(adb_init);
|
||||
device_initcall(adb_init);
|
||||
|
||||
static int
|
||||
do_adb_reset_bus(void)
|
||||
|
||||
@ -65,6 +65,9 @@ struct property *of_find_property(const struct device_node *np,
|
||||
{
|
||||
struct property *pp;
|
||||
|
||||
if (!np)
|
||||
return NULL;
|
||||
|
||||
read_lock(&devtree_lock);
|
||||
for (pp = np->properties; pp != 0; pp = pp->next) {
|
||||
if (of_prop_cmp(pp->name, name) == 0) {
|
||||
|
||||
@ -177,6 +177,7 @@ extern struct mmu_psize_def mmu_psize_defs[MMU_PAGE_COUNT];
|
||||
extern int mmu_linear_psize;
|
||||
extern int mmu_virtual_psize;
|
||||
extern int mmu_vmalloc_psize;
|
||||
extern int mmu_vmemmap_psize;
|
||||
extern int mmu_io_psize;
|
||||
extern int mmu_kernel_ssize;
|
||||
extern int mmu_highuser_ssize;
|
||||
|
||||
@ -65,15 +65,15 @@
|
||||
|
||||
#define VMALLOC_REGION_ID (REGION_ID(VMALLOC_START))
|
||||
#define KERNEL_REGION_ID (REGION_ID(PAGE_OFFSET))
|
||||
#define VMEMMAP_REGION_ID (0xfUL)
|
||||
#define USER_REGION_ID (0UL)
|
||||
|
||||
/*
|
||||
* Defines the address of the vmemap area, in the top 16th of the
|
||||
* kernel region.
|
||||
* Defines the address of the vmemap area, in its own region
|
||||
*/
|
||||
#define VMEMMAP_BASE (ASM_CONST(CONFIG_KERNEL_START) + \
|
||||
(0xfUL << (REGION_SHIFT - 4)))
|
||||
#define vmemmap ((struct page *)VMEMMAP_BASE)
|
||||
#define VMEMMAP_BASE (VMEMMAP_REGION_ID << REGION_SHIFT)
|
||||
#define vmemmap ((struct page *)VMEMMAP_BASE)
|
||||
|
||||
|
||||
/*
|
||||
* Common bits in a linux-style PTE. These match the bits in the
|
||||
|
||||
@ -380,7 +380,7 @@ static inline unsigned long __copy_from_user_inatomic(void *to,
|
||||
const void __user *from, unsigned long n)
|
||||
{
|
||||
if (__builtin_constant_p(n) && (n <= 8)) {
|
||||
unsigned long ret;
|
||||
unsigned long ret = 1;
|
||||
|
||||
switch (n) {
|
||||
case 1:
|
||||
@ -406,7 +406,7 @@ static inline unsigned long __copy_to_user_inatomic(void __user *to,
|
||||
const void *from, unsigned long n)
|
||||
{
|
||||
if (__builtin_constant_p(n) && (n <= 8)) {
|
||||
unsigned long ret;
|
||||
unsigned long ret = 1;
|
||||
|
||||
switch (n) {
|
||||
case 1:
|
||||
|
||||
Loading…
Reference in New Issue
Block a user