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ioat: split ioat_dma_probe into core/version-specific routines
Towards the removal of ioatdma_device.version split the initialization path into distinct versions. This conversion: 1/ moves version specific probe code to version specific routines 2/ removes the need for ioat_device 3/ turns off the ioat1 msi quirk if the device is reinitialized for intx Signed-off-by: Maciej Sosnowski <maciej.sosnowski@intel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
This commit is contained in:
Dan Williams
parent
b31b78f1ab
commit
f2427e276f
@ -121,52 +121,21 @@ static int ioat_dma_enumerate_channels(struct ioatdma_device *device)
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int i;
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struct ioat_dma_chan *ioat_chan;
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struct device *dev = &device->pdev->dev;
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struct dma_device *dma = &device->common;
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/*
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* IOAT ver.3 workarounds
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*/
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if (device->version == IOAT_VER_3_0) {
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u32 chan_err_mask;
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u16 dev_id;
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u32 dmauncerrsts;
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/*
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* Write CHANERRMSK_INT with 3E07h to mask out the errors
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* that can cause stability issues for IOAT ver.3
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*/
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chan_err_mask = 0x3E07;
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pci_write_config_dword(device->pdev,
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IOAT_PCI_CHANERRMASK_INT_OFFSET,
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chan_err_mask);
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/*
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* Clear DMAUNCERRSTS Cfg-Reg Parity Error status bit
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* (workaround for spurious config parity error after restart)
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*/
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pci_read_config_word(device->pdev,
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IOAT_PCI_DEVICE_ID_OFFSET,
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&dev_id);
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if (dev_id == PCI_DEVICE_ID_INTEL_IOAT_TBG0) {
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dmauncerrsts = 0x10;
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pci_write_config_dword(device->pdev,
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IOAT_PCI_DMAUNCERRSTS_OFFSET,
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dmauncerrsts);
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}
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}
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device->common.chancnt = readb(device->reg_base + IOAT_CHANCNT_OFFSET);
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INIT_LIST_HEAD(&dma->channels);
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dma->chancnt = readb(device->reg_base + IOAT_CHANCNT_OFFSET);
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xfercap_scale = readb(device->reg_base + IOAT_XFERCAP_OFFSET);
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xfercap = (xfercap_scale == 0 ? -1 : (1UL << xfercap_scale));
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#ifdef CONFIG_I7300_IDLE_IOAT_CHANNEL
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if (i7300_idle_platform_probe(NULL, NULL, 1) == 0) {
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device->common.chancnt--;
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}
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if (i7300_idle_platform_probe(NULL, NULL, 1) == 0)
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dma->chancnt--;
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#endif
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for (i = 0; i < device->common.chancnt; i++) {
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for (i = 0; i < dma->chancnt; i++) {
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ioat_chan = devm_kzalloc(dev, sizeof(*ioat_chan), GFP_KERNEL);
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if (!ioat_chan) {
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device->common.chancnt = i;
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dma->chancnt = i;
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break;
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}
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@ -175,28 +144,20 @@ static int ioat_dma_enumerate_channels(struct ioatdma_device *device)
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ioat_chan->xfercap = xfercap;
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ioat_chan->desccount = 0;
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INIT_DELAYED_WORK(&ioat_chan->work, ioat_dma_chan_reset_part2);
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if (ioat_chan->device->version == IOAT_VER_2_0)
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writel(IOAT_DCACTRL_CMPL_WRITE_ENABLE |
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IOAT_DMA_DCA_ANY_CPU,
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ioat_chan->reg_base + IOAT_DCACTRL_OFFSET);
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else if (ioat_chan->device->version == IOAT_VER_3_0)
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writel(IOAT_DMA_DCA_ANY_CPU,
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ioat_chan->reg_base + IOAT_DCACTRL_OFFSET);
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spin_lock_init(&ioat_chan->cleanup_lock);
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spin_lock_init(&ioat_chan->desc_lock);
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INIT_LIST_HEAD(&ioat_chan->free_desc);
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INIT_LIST_HEAD(&ioat_chan->used_desc);
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/* This should be made common somewhere in dmaengine.c */
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ioat_chan->common.device = &device->common;
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list_add_tail(&ioat_chan->common.device_node,
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&device->common.channels);
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list_add_tail(&ioat_chan->common.device_node, &dma->channels);
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device->idx[i] = ioat_chan;
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tasklet_init(&ioat_chan->cleanup_task,
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ioat_dma_cleanup_tasklet,
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(unsigned long) ioat_chan);
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tasklet_disable(&ioat_chan->cleanup_task);
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}
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return device->common.chancnt;
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return dma->chancnt;
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}
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/**
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@ -1504,15 +1465,6 @@ msi:
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pci_disable_msi(pdev);
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goto intx;
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}
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/*
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* CB 1.2 devices need a bit set in configuration space to enable MSI
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*/
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if (device->version == IOAT_VER_1_2) {
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u32 dmactrl;
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pci_read_config_dword(pdev, IOAT_PCI_DMACTRL_OFFSET, &dmactrl);
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dmactrl |= IOAT_PCI_DMACTRL_MSI_EN;
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pci_write_config_dword(pdev, IOAT_PCI_DMACTRL_OFFSET, dmactrl);
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}
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goto done;
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intx:
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@ -1522,6 +1474,8 @@ intx:
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goto err_no_irq;
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done:
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if (device->intr_quirk)
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device->intr_quirk(device);
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intrctrl |= IOAT_INTRCTRL_MASTER_INT_EN;
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writeb(intrctrl, device->reg_base + IOAT_INTRCTRL_OFFSET);
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return 0;
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@ -1539,21 +1493,12 @@ static void ioat_disable_interrupts(struct ioatdma_device *device)
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writeb(0, device->reg_base + IOAT_INTRCTRL_OFFSET);
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}
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struct ioatdma_device *
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ioat_dma_probe(struct pci_dev *pdev, void __iomem *iobase)
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static int ioat_probe(struct ioatdma_device *device)
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{
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int err;
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int err = -ENODEV;
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struct dma_device *dma = &device->common;
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struct pci_dev *pdev = device->pdev;
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struct device *dev = &pdev->dev;
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struct ioatdma_device *device;
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struct dma_device *dma;
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device = devm_kzalloc(dev, sizeof(*device), GFP_KERNEL);
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if (!device)
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err = -ENOMEM;
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device->pdev = pdev;
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device->reg_base = iobase;
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device->version = readb(device->reg_base + IOAT_VER_OFFSET);
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dma = &device->common;
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/* DMA coherent memory pool for DMA descriptor allocations */
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device->dma_pool = pci_pool_create("dma_desc_pool", pdev,
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@ -1572,26 +1517,13 @@ ioat_dma_probe(struct pci_dev *pdev, void __iomem *iobase)
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goto err_completion_pool;
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}
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INIT_LIST_HEAD(&dma->channels);
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ioat_dma_enumerate_channels(device);
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dma_cap_set(DMA_MEMCPY, dma->cap_mask);
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dma->device_alloc_chan_resources = ioat_dma_alloc_chan_resources;
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dma->device_free_chan_resources = ioat_dma_free_chan_resources;
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dma->dev = &pdev->dev;
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dma_cap_set(DMA_MEMCPY, dma->cap_mask);
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dma->device_is_tx_complete = ioat_dma_is_complete;
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switch (device->version) {
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case IOAT_VER_1_2:
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dma->device_prep_dma_memcpy = ioat1_dma_prep_memcpy;
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dma->device_issue_pending = ioat1_dma_memcpy_issue_pending;
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break;
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case IOAT_VER_2_0:
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case IOAT_VER_3_0:
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dma->device_prep_dma_memcpy = ioat2_dma_prep_memcpy;
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dma->device_issue_pending = ioat2_dma_memcpy_issue_pending;
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break;
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}
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dma->dev = &pdev->dev;
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dev_err(dev, "Intel(R) I/OAT DMA Engine found,"
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" %d channels, device version 0x%02x, driver version %s\n",
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@ -1611,19 +1543,7 @@ ioat_dma_probe(struct pci_dev *pdev, void __iomem *iobase)
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if (err)
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goto err_self_test;
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err = dma_async_device_register(dma);
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if (err)
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goto err_self_test;
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ioat_set_tcp_copy_break(device);
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if (device->version != IOAT_VER_3_0) {
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INIT_DELAYED_WORK(&device->work, ioat_dma_chan_watchdog);
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schedule_delayed_work(&device->work,
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WATCHDOG_DELAY);
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}
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return device;
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return 0;
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err_self_test:
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ioat_disable_interrupts(device);
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@ -1632,7 +1552,142 @@ err_setup_interrupts:
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err_completion_pool:
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pci_pool_destroy(device->dma_pool);
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err_dma_pool:
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return NULL;
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return err;
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}
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static int ioat_register(struct ioatdma_device *device)
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{
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int err = dma_async_device_register(&device->common);
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if (err) {
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ioat_disable_interrupts(device);
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pci_pool_destroy(device->completion_pool);
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pci_pool_destroy(device->dma_pool);
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}
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return err;
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}
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/* ioat1_intr_quirk - fix up dma ctrl register to enable / disable msi */
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static void ioat1_intr_quirk(struct ioatdma_device *device)
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{
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struct pci_dev *pdev = device->pdev;
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u32 dmactrl;
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pci_read_config_dword(pdev, IOAT_PCI_DMACTRL_OFFSET, &dmactrl);
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if (pdev->msi_enabled)
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dmactrl |= IOAT_PCI_DMACTRL_MSI_EN;
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else
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dmactrl &= ~IOAT_PCI_DMACTRL_MSI_EN;
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pci_write_config_dword(pdev, IOAT_PCI_DMACTRL_OFFSET, dmactrl);
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}
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int ioat1_dma_probe(struct ioatdma_device *device, int dca)
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{
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struct pci_dev *pdev = device->pdev;
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struct dma_device *dma;
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int err;
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device->intr_quirk = ioat1_intr_quirk;
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dma = &device->common;
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dma->device_prep_dma_memcpy = ioat1_dma_prep_memcpy;
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dma->device_issue_pending = ioat1_dma_memcpy_issue_pending;
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err = ioat_probe(device);
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if (err)
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return err;
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ioat_set_tcp_copy_break(4096);
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err = ioat_register(device);
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if (err)
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return err;
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if (dca)
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device->dca = ioat_dca_init(pdev, device->reg_base);
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INIT_DELAYED_WORK(&device->work, ioat_dma_chan_watchdog);
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schedule_delayed_work(&device->work, WATCHDOG_DELAY);
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return err;
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}
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int ioat2_dma_probe(struct ioatdma_device *device, int dca)
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{
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struct pci_dev *pdev = device->pdev;
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struct dma_device *dma;
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struct dma_chan *chan;
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struct ioat_dma_chan *ioat_chan;
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int err;
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dma = &device->common;
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dma->device_prep_dma_memcpy = ioat2_dma_prep_memcpy;
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dma->device_issue_pending = ioat2_dma_memcpy_issue_pending;
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err = ioat_probe(device);
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if (err)
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return err;
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ioat_set_tcp_copy_break(2048);
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list_for_each_entry(chan, &dma->channels, device_node) {
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ioat_chan = to_ioat_chan(chan);
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writel(IOAT_DCACTRL_CMPL_WRITE_ENABLE | IOAT_DMA_DCA_ANY_CPU,
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ioat_chan->reg_base + IOAT_DCACTRL_OFFSET);
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}
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err = ioat_register(device);
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if (err)
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return err;
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if (dca)
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device->dca = ioat2_dca_init(pdev, device->reg_base);
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INIT_DELAYED_WORK(&device->work, ioat_dma_chan_watchdog);
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schedule_delayed_work(&device->work, WATCHDOG_DELAY);
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return err;
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}
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int ioat3_dma_probe(struct ioatdma_device *device, int dca)
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{
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struct pci_dev *pdev = device->pdev;
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struct dma_device *dma;
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struct dma_chan *chan;
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struct ioat_dma_chan *ioat_chan;
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int err;
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u16 dev_id;
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dma = &device->common;
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dma->device_prep_dma_memcpy = ioat2_dma_prep_memcpy;
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dma->device_issue_pending = ioat2_dma_memcpy_issue_pending;
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/* -= IOAT ver.3 workarounds =- */
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/* Write CHANERRMSK_INT with 3E07h to mask out the errors
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* that can cause stability issues for IOAT ver.3
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*/
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pci_write_config_dword(pdev, IOAT_PCI_CHANERRMASK_INT_OFFSET, 0x3e07);
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/* Clear DMAUNCERRSTS Cfg-Reg Parity Error status bit
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* (workaround for spurious config parity error after restart)
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*/
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pci_read_config_word(pdev, IOAT_PCI_DEVICE_ID_OFFSET, &dev_id);
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if (dev_id == PCI_DEVICE_ID_INTEL_IOAT_TBG0)
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pci_write_config_dword(pdev, IOAT_PCI_DMAUNCERRSTS_OFFSET, 0x10);
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err = ioat_probe(device);
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if (err)
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return err;
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ioat_set_tcp_copy_break(262144);
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list_for_each_entry(chan, &dma->channels, device_node) {
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ioat_chan = to_ioat_chan(chan);
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writel(IOAT_DMA_DCA_ANY_CPU,
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ioat_chan->reg_base + IOAT_DCACTRL_OFFSET);
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}
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err = ioat_register(device);
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if (err)
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return err;
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if (dca)
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device->dca = ioat3_dca_init(pdev, device->reg_base);
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return err;
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}
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void ioat_dma_remove(struct ioatdma_device *device)
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@ -61,6 +61,8 @@
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* @version: version of ioatdma device
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* @msix_entries: irq handlers
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* @idx: per channel data
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* @dca: direct cache access context
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* @intr_quirk: interrupt setup quirk (for ioat_v1 devices)
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*/
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struct ioatdma_device {
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@ -73,6 +75,8 @@ struct ioatdma_device {
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struct delayed_work work;
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struct msix_entry msix_entries[4];
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struct ioat_dma_chan *idx[4];
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struct dca_provider *dca;
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void (*intr_quirk)(struct ioatdma_device *device);
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};
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/**
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@ -136,25 +140,16 @@ struct ioat_desc_sw {
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struct dma_async_tx_descriptor txd;
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};
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static inline void ioat_set_tcp_copy_break(struct ioatdma_device *dev)
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static inline void ioat_set_tcp_copy_break(unsigned long copybreak)
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{
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#ifdef CONFIG_NET_DMA
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switch (dev->version) {
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case IOAT_VER_1_2:
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sysctl_tcp_dma_copybreak = 4096;
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break;
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case IOAT_VER_2_0:
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sysctl_tcp_dma_copybreak = 2048;
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break;
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case IOAT_VER_3_0:
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sysctl_tcp_dma_copybreak = 262144;
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break;
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}
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sysctl_tcp_dma_copybreak = copybreak;
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#endif
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}
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struct ioatdma_device *ioat_dma_probe(struct pci_dev *pdev,
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void __iomem *iobase);
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int ioat1_dma_probe(struct ioatdma_device *dev, int dca);
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int ioat2_dma_probe(struct ioatdma_device *dev, int dca);
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int ioat3_dma_probe(struct ioatdma_device *dev, int dca);
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void ioat_dma_remove(struct ioatdma_device *device);
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struct dca_provider *ioat_dca_init(struct pci_dev *pdev, void __iomem *iobase);
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struct dca_provider *ioat2_dca_init(struct pci_dev *pdev, void __iomem *iobase);
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@ -60,14 +60,8 @@ static struct pci_device_id ioat_pci_tbl[] = {
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{ 0, }
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};
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struct ioat_device {
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struct pci_dev *pdev;
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struct ioatdma_device *dma;
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struct dca_provider *dca;
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};
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static int __devinit ioat_probe(struct pci_dev *pdev,
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const struct pci_device_id *id);
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static int __devinit ioat_pci_probe(struct pci_dev *pdev,
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const struct pci_device_id *id);
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static void __devexit ioat_remove(struct pci_dev *pdev);
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static int ioat_dca_enabled = 1;
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@ -79,17 +73,28 @@ MODULE_PARM_DESC(ioat_dca_enabled, "control support of dca service (default: 1)"
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static struct pci_driver ioat_pci_driver = {
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.name = DRV_NAME,
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.id_table = ioat_pci_tbl,
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.probe = ioat_probe,
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.probe = ioat_pci_probe,
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.remove = __devexit_p(ioat_remove),
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};
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static int __devinit ioat_probe(struct pci_dev *pdev,
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const struct pci_device_id *id)
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static struct ioatdma_device *
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alloc_ioatdma(struct pci_dev *pdev, void __iomem *iobase)
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{
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struct device *dev = &pdev->dev;
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struct ioatdma_device *d = devm_kzalloc(dev, sizeof(*d), GFP_KERNEL);
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if (!d)
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return NULL;
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d->pdev = pdev;
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d->reg_base = iobase;
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return d;
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}
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static int __devinit ioat_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
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{
|
||||
void __iomem * const *iomap;
|
||||
void __iomem *iobase;
|
||||
struct device *dev = &pdev->dev;
|
||||
struct ioat_device *device;
|
||||
struct ioatdma_device *device;
|
||||
int err;
|
||||
|
||||
err = pcim_enable_device(pdev);
|
||||
@ -119,33 +124,24 @@ static int __devinit ioat_probe(struct pci_dev *pdev,
|
||||
if (!device)
|
||||
return -ENOMEM;
|
||||
|
||||
device->pdev = pdev;
|
||||
pci_set_drvdata(pdev, device);
|
||||
iobase = iomap[IOAT_MMIO_BAR];
|
||||
|
||||
pci_set_master(pdev);
|
||||
|
||||
switch (readb(iobase + IOAT_VER_OFFSET)) {
|
||||
case IOAT_VER_1_2:
|
||||
device->dma = ioat_dma_probe(pdev, iobase);
|
||||
if (device->dma && ioat_dca_enabled)
|
||||
device->dca = ioat_dca_init(pdev, iobase);
|
||||
break;
|
||||
case IOAT_VER_2_0:
|
||||
device->dma = ioat_dma_probe(pdev, iobase);
|
||||
if (device->dma && ioat_dca_enabled)
|
||||
device->dca = ioat2_dca_init(pdev, iobase);
|
||||
break;
|
||||
case IOAT_VER_3_0:
|
||||
device->dma = ioat_dma_probe(pdev, iobase);
|
||||
if (device->dma && ioat_dca_enabled)
|
||||
device->dca = ioat3_dca_init(pdev, iobase);
|
||||
break;
|
||||
default:
|
||||
return -ENODEV;
|
||||
}
|
||||
device = alloc_ioatdma(pdev, iomap[IOAT_MMIO_BAR]);
|
||||
if (!device)
|
||||
return -ENOMEM;
|
||||
pci_set_drvdata(pdev, device);
|
||||
|
||||
if (!device->dma) {
|
||||
device->version = readb(device->reg_base + IOAT_VER_OFFSET);
|
||||
if (device->version == IOAT_VER_1_2)
|
||||
err = ioat1_dma_probe(device, ioat_dca_enabled);
|
||||
else if (device->version == IOAT_VER_2_0)
|
||||
err = ioat2_dma_probe(device, ioat_dca_enabled);
|
||||
else if (device->version >= IOAT_VER_3_0)
|
||||
err = ioat3_dma_probe(device, ioat_dca_enabled);
|
||||
else
|
||||
return -ENODEV;
|
||||
|
||||
if (err) {
|
||||
dev_err(dev, "Intel(R) I/OAT DMA Engine init failed\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
@ -155,7 +151,10 @@ static int __devinit ioat_probe(struct pci_dev *pdev,
|
||||
|
||||
static void __devexit ioat_remove(struct pci_dev *pdev)
|
||||
{
|
||||
struct ioat_device *device = pci_get_drvdata(pdev);
|
||||
struct ioatdma_device *device = pci_get_drvdata(pdev);
|
||||
|
||||
if (!device)
|
||||
return;
|
||||
|
||||
dev_err(&pdev->dev, "Removing dma and dca services\n");
|
||||
if (device->dca) {
|
||||
@ -163,11 +162,7 @@ static void __devexit ioat_remove(struct pci_dev *pdev)
|
||||
free_dca_provider(device->dca);
|
||||
device->dca = NULL;
|
||||
}
|
||||
|
||||
if (device->dma) {
|
||||
ioat_dma_remove(device->dma);
|
||||
device->dma = NULL;
|
||||
}
|
||||
ioat_dma_remove(device);
|
||||
}
|
||||
|
||||
static int __init ioat_init_module(void)
|
||||
|
||||
Loading…
Reference in New Issue
Block a user