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mlx5: minor fixes (mainly avoidance of hidden casts)
There were many places where parameters which should be u8/u16 were integer type. Additionally, in 2 places, a check for a non-null pointer was added before dereferencing the pointer (this is actually a bug fix). Signed-off-by: Jack Morgenstein <jackm@dev.mellanox.co.il> Signed-off-by: Eli Cohen <eli@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -348,7 +348,7 @@ static void handle_atomic(struct mlx5_ib_qp *qp, struct mlx5_cqe64 *cqe64,
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static void handle_atomics(struct mlx5_ib_qp *qp, struct mlx5_cqe64 *cqe64,
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u16 tail, u16 head)
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{
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int idx;
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u16 idx;
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do {
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idx = tail & (qp->sq.wqe_cnt - 1);
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@ -41,7 +41,7 @@ enum {
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};
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int mlx5_MAD_IFC(struct mlx5_ib_dev *dev, int ignore_mkey, int ignore_bkey,
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int port, struct ib_wc *in_wc, struct ib_grh *in_grh,
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u8 port, struct ib_wc *in_wc, struct ib_grh *in_grh,
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void *in_mad, void *response_mad)
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{
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u8 op_modifier = 0;
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@ -478,7 +478,7 @@ static struct ib_ucontext *mlx5_ib_alloc_ucontext(struct ib_device *ibdev,
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int uuarn;
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int err;
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int i;
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int reqlen;
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size_t reqlen;
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if (!dev->ib_active)
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return ERR_PTR(-EAGAIN);
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@ -148,7 +148,7 @@ int mlx5_ib_get_buf_offset(u64 addr, int page_shift, u32 *offset)
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u64 off_mask;
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u64 buf_off;
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page_size = 1 << page_shift;
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page_size = (u64)1 << page_shift;
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page_mask = page_size - 1;
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buf_off = addr & page_mask;
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off_size = page_size >> 6;
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@ -461,7 +461,7 @@ void __mlx5_ib_cq_clean(struct mlx5_ib_cq *cq, u32 qpn, struct mlx5_ib_srq *srq)
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void mlx5_ib_cq_clean(struct mlx5_ib_cq *cq, u32 qpn, struct mlx5_ib_srq *srq);
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void mlx5_ib_free_srq_wqe(struct mlx5_ib_srq *srq, int wqe_index);
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int mlx5_MAD_IFC(struct mlx5_ib_dev *dev, int ignore_mkey, int ignore_bkey,
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int port, struct ib_wc *in_wc, struct ib_grh *in_grh,
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u8 port, struct ib_wc *in_wc, struct ib_grh *in_grh,
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void *in_mad, void *response_mad);
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struct ib_ah *create_ib_ah(struct ib_ah_attr *ah_attr,
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struct mlx5_ib_ah *ah);
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@ -2539,7 +2539,7 @@ int mlx5_ib_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
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case IB_WR_RDMA_WRITE_WITH_IMM:
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set_raddr_seg(seg, wr->wr.rdma.remote_addr,
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wr->wr.rdma.rkey);
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seg += sizeof(struct mlx5_wqe_raddr_seg);
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seg += sizeof(struct mlx5_wqe_raddr_seg);
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size += sizeof(struct mlx5_wqe_raddr_seg) / 16;
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break;
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@ -2668,7 +2668,7 @@ int mlx5_ib_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
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case IB_QPT_SMI:
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case IB_QPT_GSI:
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set_datagram_seg(seg, wr);
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seg += sizeof(struct mlx5_wqe_datagram_seg);
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seg += sizeof(struct mlx5_wqe_datagram_seg);
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size += sizeof(struct mlx5_wqe_datagram_seg) / 16;
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if (unlikely((seg == qend)))
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seg = mlx5_get_send_wqe(qp, 0);
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@ -56,7 +56,7 @@ int mlx5_buf_alloc(struct mlx5_core_dev *dev, int size, int max_direct,
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if (size <= max_direct) {
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buf->nbufs = 1;
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buf->npages = 1;
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buf->page_shift = get_order(size) + PAGE_SHIFT;
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buf->page_shift = (u8)get_order(size) + PAGE_SHIFT;
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buf->direct.buf = dma_zalloc_coherent(&dev->pdev->dev,
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size, &t, GFP_KERNEL);
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if (!buf->direct.buf)
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@ -464,7 +464,7 @@ static void dump_command(struct mlx5_core_dev *dev,
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struct mlx5_cmd_msg *msg = input ? ent->in : ent->out;
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struct mlx5_cmd_mailbox *next = msg->next;
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int data_only;
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int offset = 0;
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u32 offset = 0;
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int dump_len;
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data_only = !!(mlx5_core_debug_mask & (1 << MLX5_CMD_DATA));
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@ -252,7 +252,8 @@ static int mlx5_eq_int(struct mlx5_core_dev *dev, struct mlx5_eq *eq)
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case MLX5_PORT_CHANGE_SUBTYPE_GUID:
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case MLX5_PORT_CHANGE_SUBTYPE_CLIENT_REREG:
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case MLX5_PORT_CHANGE_SUBTYPE_INITIALIZED:
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dev->event(dev, port_subtype_event(eqe->sub_type), &port);
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if (dev->event)
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dev->event(dev, port_subtype_event(eqe->sub_type), &port);
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break;
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default:
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mlx5_core_warn(dev, "Port event with unrecognized subtype: port %d, sub_type %d\n",
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@ -37,7 +37,7 @@
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#include "mlx5_core.h"
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int mlx5_core_mad_ifc(struct mlx5_core_dev *dev, void *inb, void *outb,
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u16 opmod, int port)
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u16 opmod, u8 port)
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{
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struct mlx5_mad_ifc_mbox_in *in = NULL;
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struct mlx5_mad_ifc_mbox_out *out = NULL;
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@ -311,7 +311,7 @@ static int handle_hca_cap(struct mlx5_core_dev *dev)
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copy_rw_fields(&set_ctx->hca_cap, &query_out->hca_cap);
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if (dev->profile->mask & MLX5_PROF_MASK_QP_SIZE)
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if (dev->profile && dev->profile->mask & MLX5_PROF_MASK_QP_SIZE)
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set_ctx->hca_cap.log_max_qp = dev->profile->log_max_qp;
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flags = be64_to_cpu(query_out->hca_cap.flags);
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@ -51,7 +51,7 @@ enum {
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struct mlx5_pages_req {
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struct mlx5_core_dev *dev;
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u32 func_id;
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u16 func_id;
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s32 npages;
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struct work_struct work;
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};
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@ -86,7 +86,7 @@ struct mlx5_reg_pcap {
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__be32 caps_31_0;
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};
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int mlx5_set_port_caps(struct mlx5_core_dev *dev, int port_num, u32 caps)
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int mlx5_set_port_caps(struct mlx5_core_dev *dev, u8 port_num, u32 caps)
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{
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struct mlx5_reg_pcap in;
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struct mlx5_reg_pcap out;
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@ -456,9 +456,6 @@ struct mlx5_eqe_cq_err {
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u8 syndrome;
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};
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struct mlx5_eqe_dropped_packet {
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};
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struct mlx5_eqe_port_state {
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u8 reserved0[8];
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u8 port;
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@ -498,7 +495,6 @@ union ev_data {
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struct mlx5_eqe_comp comp;
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struct mlx5_eqe_qp_srq qp_srq;
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struct mlx5_eqe_cq_err cq_err;
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struct mlx5_eqe_dropped_packet dp;
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struct mlx5_eqe_port_state port;
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struct mlx5_eqe_gpio gpio;
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struct mlx5_eqe_congestion cong;
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@ -381,8 +381,8 @@ struct mlx5_buf {
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struct mlx5_buf_list *page_list;
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int nbufs;
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int npages;
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int page_shift;
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int size;
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u8 page_shift;
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};
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struct mlx5_eq {
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@ -736,7 +736,7 @@ int mlx5_core_dump_fill_mkey(struct mlx5_core_dev *dev, struct mlx5_core_mr *mr,
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int mlx5_core_alloc_pd(struct mlx5_core_dev *dev, u32 *pdn);
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int mlx5_core_dealloc_pd(struct mlx5_core_dev *dev, u32 pdn);
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int mlx5_core_mad_ifc(struct mlx5_core_dev *dev, void *inb, void *outb,
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u16 opmod, int port);
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u16 opmod, u8 port);
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void mlx5_pagealloc_init(struct mlx5_core_dev *dev);
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void mlx5_pagealloc_cleanup(struct mlx5_core_dev *dev);
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int mlx5_pagealloc_start(struct mlx5_core_dev *dev);
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@ -769,7 +769,7 @@ void mlx5_qp_debugfs_cleanup(struct mlx5_core_dev *dev);
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int mlx5_core_access_reg(struct mlx5_core_dev *dev, void *data_in,
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int size_in, void *data_out, int size_out,
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u16 reg_num, int arg, int write);
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int mlx5_set_port_caps(struct mlx5_core_dev *dev, int port_num, u32 caps);
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int mlx5_set_port_caps(struct mlx5_core_dev *dev, u8 port_num, u32 caps);
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int mlx5_debug_eq_add(struct mlx5_core_dev *dev, struct mlx5_eq *eq);
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void mlx5_debug_eq_remove(struct mlx5_core_dev *dev, struct mlx5_eq *eq);
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@ -826,7 +826,7 @@ void mlx5_unregister_interface(struct mlx5_interface *intf);
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struct mlx5_profile {
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u64 mask;
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u32 log_max_qp;
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u8 log_max_qp;
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struct {
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int size;
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int limit;
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