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ARM: dts: stm32: Use clock DT binding definition on stm32f429 family
This patch uses clock DT binding definition instead numerical values for stm32f429 board. Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com> Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
This commit is contained in:
Gabriel Fernandez
Alexandre TORGUE
parent
2cfb397b15
commit
f20a406bf7
@ -121,7 +121,7 @@
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usbotg_hs_phy: usbphy {
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#phy-cells = <0>;
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compatible = "usb-nop-xceiv";
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clocks = <&rcc 0 30>;
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clocks = <&rcc 0 STM32F4_AHB1_CLOCK(OTGHSULPI)>;
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clock-names = "main_clk";
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};
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};
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@ -49,6 +49,7 @@
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#include "armv7-m.dtsi"
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#include <dt-bindings/pinctrl/stm32f429-pinfunc.h>
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#include <dt-bindings/clock/stm32fx-clock.h>
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#include <dt-bindings/mfd/stm32f4-rcc.h>
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/ {
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clocks {
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@ -82,7 +83,7 @@
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compatible = "st,stm32-timer";
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reg = <0x40000000 0x400>;
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interrupts = <28>;
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clocks = <&rcc 0 128>;
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clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM2)>;
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status = "disabled";
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};
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@ -91,7 +92,7 @@
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#size-cells = <0>;
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compatible = "st,stm32-timers";
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reg = <0x40000000 0x400>;
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clocks = <&rcc 0 128>;
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clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM2)>;
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clock-names = "int";
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status = "disabled";
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@ -111,7 +112,7 @@
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compatible = "st,stm32-timer";
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reg = <0x40000400 0x400>;
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interrupts = <29>;
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clocks = <&rcc 0 129>;
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clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM3)>;
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status = "disabled";
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};
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@ -120,7 +121,7 @@
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#size-cells = <0>;
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compatible = "st,stm32-timers";
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reg = <0x40000400 0x400>;
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clocks = <&rcc 0 129>;
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clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM3)>;
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clock-names = "int";
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status = "disabled";
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@ -140,7 +141,7 @@
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compatible = "st,stm32-timer";
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reg = <0x40000800 0x400>;
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interrupts = <30>;
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clocks = <&rcc 0 130>;
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clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM4)>;
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status = "disabled";
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};
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@ -149,7 +150,7 @@
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#size-cells = <0>;
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compatible = "st,stm32-timers";
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reg = <0x40000800 0x400>;
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clocks = <&rcc 0 130>;
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clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM4)>;
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clock-names = "int";
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status = "disabled";
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@ -169,7 +170,7 @@
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compatible = "st,stm32-timer";
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reg = <0x40000c00 0x400>;
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interrupts = <50>;
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clocks = <&rcc 0 131>;
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clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM5)>;
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};
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timers5: timers@40000c00 {
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@ -177,7 +178,7 @@
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#size-cells = <0>;
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compatible = "st,stm32-timers";
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reg = <0x40000C00 0x400>;
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clocks = <&rcc 0 131>;
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clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM5)>;
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clock-names = "int";
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status = "disabled";
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@ -197,7 +198,7 @@
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compatible = "st,stm32-timer";
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reg = <0x40001000 0x400>;
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interrupts = <54>;
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clocks = <&rcc 0 132>;
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clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM6)>;
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status = "disabled";
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};
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@ -206,7 +207,7 @@
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#size-cells = <0>;
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compatible = "st,stm32-timers";
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reg = <0x40001000 0x400>;
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clocks = <&rcc 0 132>;
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clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM6)>;
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clock-names = "int";
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status = "disabled";
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@ -221,7 +222,7 @@
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compatible = "st,stm32-timer";
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reg = <0x40001400 0x400>;
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interrupts = <55>;
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clocks = <&rcc 0 133>;
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clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM7)>;
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status = "disabled";
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};
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@ -230,7 +231,7 @@
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#size-cells = <0>;
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compatible = "st,stm32-timers";
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reg = <0x40001400 0x400>;
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clocks = <&rcc 0 133>;
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clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM7)>;
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clock-names = "int";
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status = "disabled";
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@ -246,7 +247,7 @@
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#size-cells = <0>;
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compatible = "st,stm32-timers";
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reg = <0x40001800 0x400>;
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clocks = <&rcc 0 134>;
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clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM12)>;
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clock-names = "int";
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status = "disabled";
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@ -267,7 +268,7 @@
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#size-cells = <0>;
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compatible = "st,stm32-timers";
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reg = <0x40001C00 0x400>;
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clocks = <&rcc 0 135>;
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clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM13)>;
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clock-names = "int";
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status = "disabled";
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@ -282,7 +283,7 @@
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#size-cells = <0>;
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compatible = "st,stm32-timers";
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reg = <0x40002000 0x400>;
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clocks = <&rcc 0 136>;
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clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM14)>;
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clock-names = "int";
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status = "disabled";
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@ -310,7 +311,7 @@
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compatible = "st,stm32-usart", "st,stm32-uart";
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reg = <0x40004400 0x400>;
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interrupts = <38>;
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clocks = <&rcc 0 145>;
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clocks = <&rcc 0 STM32F4_APB1_CLOCK(UART2)>;
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status = "disabled";
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};
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@ -318,7 +319,7 @@
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compatible = "st,stm32-usart", "st,stm32-uart";
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reg = <0x40004800 0x400>;
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interrupts = <39>;
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clocks = <&rcc 0 146>;
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clocks = <&rcc 0 STM32F4_APB1_CLOCK(UART3)>;
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status = "disabled";
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dmas = <&dma1 1 4 0x400 0x0>,
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<&dma1 3 4 0x400 0x0>;
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@ -329,7 +330,7 @@
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compatible = "st,stm32-uart";
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reg = <0x40004c00 0x400>;
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interrupts = <52>;
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clocks = <&rcc 0 147>;
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clocks = <&rcc 0 STM32F4_APB1_CLOCK(UART4)>;
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status = "disabled";
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};
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@ -337,7 +338,7 @@
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compatible = "st,stm32-uart";
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reg = <0x40005000 0x400>;
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interrupts = <53>;
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clocks = <&rcc 0 148>;
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clocks = <&rcc 0 STM32F4_APB1_CLOCK(UART5)>;
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status = "disabled";
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};
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@ -345,7 +346,7 @@
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compatible = "st,stm32-usart", "st,stm32-uart";
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reg = <0x40007800 0x400>;
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interrupts = <82>;
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clocks = <&rcc 0 158>;
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clocks = <&rcc 0 STM32F4_APB1_CLOCK(UART7)>;
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status = "disabled";
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};
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@ -353,7 +354,7 @@
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compatible = "st,stm32-usart", "st,stm32-uart";
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reg = <0x40007c00 0x400>;
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interrupts = <83>;
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clocks = <&rcc 0 159>;
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clocks = <&rcc 0 STM32F4_APB1_CLOCK(UART8)>;
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status = "disabled";
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};
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@ -362,7 +363,7 @@
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#size-cells = <0>;
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compatible = "st,stm32-timers";
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reg = <0x40010000 0x400>;
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clocks = <&rcc 0 160>;
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clocks = <&rcc 0 STM32F4_APB2_CLOCK(TIM1)>;
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clock-names = "int";
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status = "disabled";
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@ -383,7 +384,7 @@
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#size-cells = <0>;
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compatible = "st,stm32-timers";
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reg = <0x40010400 0x400>;
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clocks = <&rcc 0 161>;
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clocks = <&rcc 0 STM32F4_APB2_CLOCK(TIM8)>;
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clock-names = "int";
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status = "disabled";
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@ -403,7 +404,7 @@
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compatible = "st,stm32-usart", "st,stm32-uart";
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reg = <0x40011000 0x400>;
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interrupts = <37>;
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clocks = <&rcc 0 164>;
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clocks = <&rcc 0 STM32F4_APB2_CLOCK(USART1)>;
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status = "disabled";
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dmas = <&dma2 2 4 0x400 0x0>,
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<&dma2 7 4 0x400 0x0>;
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@ -414,7 +415,7 @@
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compatible = "st,stm32-usart", "st,stm32-uart";
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reg = <0x40011400 0x400>;
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interrupts = <71>;
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clocks = <&rcc 0 165>;
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clocks = <&rcc 0 STM32F4_APB2_CLOCK(USART6)>;
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status = "disabled";
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};
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@ -422,7 +423,7 @@
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compatible = "st,stm32f4-adc-core";
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reg = <0x40012000 0x400>;
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interrupts = <18>;
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clocks = <&rcc 0 168>;
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clocks = <&rcc 0 STM32F4_APB2_CLOCK(ADC1)>;
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clock-names = "adc";
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interrupt-controller;
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#interrupt-cells = <1>;
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@ -434,7 +435,7 @@
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compatible = "st,stm32f4-adc";
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#io-channel-cells = <1>;
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reg = <0x0>;
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clocks = <&rcc 0 168>;
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clocks = <&rcc 0 STM32F4_APB2_CLOCK(ADC1)>;
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interrupt-parent = <&adc>;
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interrupts = <0>;
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status = "disabled";
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@ -444,7 +445,7 @@
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compatible = "st,stm32f4-adc";
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#io-channel-cells = <1>;
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reg = <0x100>;
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clocks = <&rcc 0 169>;
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clocks = <&rcc 0 STM32F4_APB2_CLOCK(ADC2)>;
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interrupt-parent = <&adc>;
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interrupts = <1>;
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status = "disabled";
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@ -454,7 +455,7 @@
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compatible = "st,stm32f4-adc";
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#io-channel-cells = <1>;
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reg = <0x200>;
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clocks = <&rcc 0 170>;
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clocks = <&rcc 0 STM32F4_APB2_CLOCK(ADC3)>;
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interrupt-parent = <&adc>;
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interrupts = <2>;
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status = "disabled";
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@ -479,7 +480,7 @@
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#size-cells = <0>;
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compatible = "st,stm32-timers";
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reg = <0x40014000 0x400>;
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clocks = <&rcc 0 176>;
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clocks = <&rcc 0 STM32F4_APB2_CLOCK(TIM9)>;
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clock-names = "int";
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status = "disabled";
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@ -500,7 +501,7 @@
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#size-cells = <0>;
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compatible = "st,stm32-timers";
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reg = <0x40014400 0x400>;
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clocks = <&rcc 0 177>;
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clocks = <&rcc 0 STM32F4_APB2_CLOCK(TIM10)>;
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clock-names = "int";
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status = "disabled";
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@ -515,7 +516,7 @@
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#size-cells = <0>;
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compatible = "st,stm32-timers";
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reg = <0x40014800 0x400>;
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clocks = <&rcc 0 178>;
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clocks = <&rcc 0 STM32F4_APB2_CLOCK(TIM11)>;
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clock-names = "int";
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status = "disabled";
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@ -543,7 +544,7 @@
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x0 0x400>;
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clocks = <&rcc 0 0>;
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clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOA)>;
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st,bank-name = "GPIOA";
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};
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@ -551,7 +552,7 @@
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x400 0x400>;
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clocks = <&rcc 0 1>;
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clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOB)>;
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st,bank-name = "GPIOB";
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};
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@ -559,7 +560,7 @@
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x800 0x400>;
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clocks = <&rcc 0 2>;
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clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOC)>;
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st,bank-name = "GPIOC";
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};
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@ -567,7 +568,7 @@
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0xc00 0x400>;
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clocks = <&rcc 0 3>;
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clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOD)>;
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st,bank-name = "GPIOD";
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};
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@ -575,7 +576,7 @@
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x1000 0x400>;
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clocks = <&rcc 0 4>;
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clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOE)>;
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st,bank-name = "GPIOE";
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};
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@ -583,7 +584,7 @@
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x1400 0x400>;
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clocks = <&rcc 0 5>;
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clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOF)>;
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st,bank-name = "GPIOF";
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};
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@ -591,7 +592,7 @@
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x1800 0x400>;
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clocks = <&rcc 0 6>;
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clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOG)>;
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st,bank-name = "GPIOG";
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};
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@ -599,7 +600,7 @@
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x1c00 0x400>;
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clocks = <&rcc 0 7>;
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clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOH)>;
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st,bank-name = "GPIOH";
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};
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@ -607,7 +608,7 @@
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x2000 0x400>;
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clocks = <&rcc 0 8>;
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clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOI)>;
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st,bank-name = "GPIOI";
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};
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@ -615,7 +616,7 @@
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x2400 0x400>;
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clocks = <&rcc 0 9>;
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clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOJ)>;
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st,bank-name = "GPIOJ";
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};
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@ -623,7 +624,7 @@
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x2800 0x400>;
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clocks = <&rcc 0 10>;
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clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOK)>;
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st,bank-name = "GPIOK";
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};
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@ -737,7 +738,7 @@
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<16>,
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<17>,
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<47>;
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clocks = <&rcc 0 21>;
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clocks = <&rcc 0 STM32F4_AHB1_CLOCK(DMA1)>;
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#dma-cells = <4>;
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};
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@ -752,7 +753,7 @@
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<68>,
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<69>,
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<70>;
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clocks = <&rcc 0 22>;
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clocks = <&rcc 0 STM32F4_AHB1_CLOCK(DMA2)>;
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#dma-cells = <4>;
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st,mem2mem;
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};
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@ -764,7 +765,9 @@
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interrupts = <61>;
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interrupt-names = "macirq";
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clock-names = "stmmaceth", "mac-clk-tx", "mac-clk-rx";
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clocks = <&rcc 0 25>, <&rcc 0 26>, <&rcc 0 27>;
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clocks = <&rcc 0 STM32F4_AHB1_CLOCK(ETHMAC)>,
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<&rcc 0 STM32F4_AHB1_CLOCK(ETHMACTX)>,
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<&rcc 0 STM32F4_AHB1_CLOCK(ETHMACRX)>;
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st,syscon = <&syscfg 0x4>;
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snps,pbl = <8>;
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snps,mixed-burst;
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@ -775,7 +778,7 @@
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compatible = "snps,dwc2";
|
||||
reg = <0x40040000 0x40000>;
|
||||
interrupts = <77>;
|
||||
clocks = <&rcc 0 29>;
|
||||
clocks = <&rcc 0 STM32F4_AHB1_CLOCK(OTGHS)>;
|
||||
clock-names = "otg";
|
||||
status = "disabled";
|
||||
};
|
||||
@ -784,12 +787,13 @@
|
||||
compatible = "st,stm32-rng";
|
||||
reg = <0x50060800 0x400>;
|
||||
interrupts = <80>;
|
||||
clocks = <&rcc 0 38>;
|
||||
clocks = <&rcc 0 STM32F4_AHB2_CLOCK(RNG)>;
|
||||
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&systick {
|
||||
clocks = <&rcc 1 0>;
|
||||
clocks = <&rcc 1 SYSTICK>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
Loading…
Reference in New Issue
Block a user