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gpio: pl061: support irqdomain
Drop the support of irq generic chip. Now support irqdomain instead. Although set_wake() is defined in irq generic chip & it is not really used in pl061 gpio driver. Drop it at the same time. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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@ -15,6 +15,7 @@
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#include <linux/io.h>
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#include <linux/ioport.h>
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#include <linux/irq.h>
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#include <linux/irqdomain.h>
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#include <linux/bitops.h>
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#include <linux/workqueue.h>
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#include <linux/gpio.h>
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@ -51,8 +52,7 @@ struct pl061_gpio {
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spinlock_t lock;
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void __iomem *base;
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int irq_base;
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struct irq_chip_generic *irq_gc;
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struct irq_domain *domain;
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struct gpio_chip gc;
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#ifdef CONFIG_PM
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@ -122,24 +122,20 @@ static int pl061_to_irq(struct gpio_chip *gc, unsigned offset)
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{
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struct pl061_gpio *chip = container_of(gc, struct pl061_gpio, gc);
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if (chip->irq_base <= 0)
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return -EINVAL;
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return chip->irq_base + offset;
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return irq_create_mapping(chip->domain, offset);
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}
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static int pl061_irq_type(struct irq_data *d, unsigned trigger)
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{
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struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
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struct pl061_gpio *chip = gc->private;
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int offset = d->irq - chip->irq_base;
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struct pl061_gpio *chip = irq_data_get_irq_chip_data(d);
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int offset = irqd_to_hwirq(d);
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unsigned long flags;
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u8 gpiois, gpioibe, gpioiev;
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if (offset < 0 || offset >= PL061_GPIO_NR)
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return -EINVAL;
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raw_spin_lock_irqsave(&gc->lock, flags);
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spin_lock_irqsave(&chip->lock, flags);
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gpioiev = readb(chip->base + GPIOIEV);
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@ -168,7 +164,7 @@ static int pl061_irq_type(struct irq_data *d, unsigned trigger)
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writeb(gpioiev, chip->base + GPIOIEV);
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raw_spin_unlock_irqrestore(&gc->lock, flags);
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spin_unlock_irqrestore(&chip->lock, flags);
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return 0;
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}
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@ -192,31 +188,61 @@ static void pl061_irq_handler(unsigned irq, struct irq_desc *desc)
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chained_irq_exit(irqchip, desc);
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}
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static void __init pl061_init_gc(struct pl061_gpio *chip, int irq_base)
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static void pl061_irq_mask(struct irq_data *d)
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{
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struct irq_chip_type *ct;
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struct pl061_gpio *chip = irq_data_get_irq_chip_data(d);
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u8 mask = 1 << (irqd_to_hwirq(d) % PL061_GPIO_NR);
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u8 gpioie;
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chip->irq_gc = irq_alloc_generic_chip("gpio-pl061", 1, irq_base,
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chip->base, handle_simple_irq);
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chip->irq_gc->private = chip;
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ct = chip->irq_gc->chip_types;
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ct->chip.irq_mask = irq_gc_mask_clr_bit;
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ct->chip.irq_unmask = irq_gc_mask_set_bit;
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ct->chip.irq_set_type = pl061_irq_type;
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ct->chip.irq_set_wake = irq_gc_set_wake;
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ct->regs.mask = GPIOIE;
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irq_setup_generic_chip(chip->irq_gc, IRQ_MSK(PL061_GPIO_NR),
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IRQ_GC_INIT_NESTED_LOCK, IRQ_NOREQUEST, 0);
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spin_lock(&chip->lock);
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gpioie = readb(chip->base + GPIOIE) & ~mask;
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writeb(gpioie, chip->base + GPIOIE);
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spin_unlock(&chip->lock);
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}
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static void pl061_irq_unmask(struct irq_data *d)
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{
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struct pl061_gpio *chip = irq_data_get_irq_chip_data(d);
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u8 mask = 1 << (irqd_to_hwirq(d) % PL061_GPIO_NR);
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u8 gpioie;
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spin_lock(&chip->lock);
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gpioie = readb(chip->base + GPIOIE) | mask;
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writeb(gpioie, chip->base + GPIOIE);
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spin_unlock(&chip->lock);
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}
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static struct irq_chip pl061_irqchip = {
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.name = "pl061 gpio",
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.irq_mask = pl061_irq_mask,
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.irq_unmask = pl061_irq_unmask,
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.irq_set_type = pl061_irq_type,
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};
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static int pl061_irq_map(struct irq_domain *d, unsigned int virq,
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irq_hw_number_t hw)
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{
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struct pl061_gpio *chip = d->host_data;
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irq_set_chip_and_handler_name(virq, &pl061_irqchip, handle_simple_irq,
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"pl061");
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irq_set_chip_data(virq, chip);
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irq_set_irq_type(virq, IRQ_TYPE_NONE);
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return 0;
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}
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static const struct irq_domain_ops pl061_domain_ops = {
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.map = pl061_irq_map,
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.xlate = irq_domain_xlate_twocell,
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};
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static int pl061_probe(struct amba_device *adev, const struct amba_id *id)
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{
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struct device *dev = &adev->dev;
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struct pl061_platform_data *pdata = dev->platform_data;
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struct pl061_gpio *chip;
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int ret, irq, i;
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int ret, irq, i, irq_base;
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chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL);
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if (chip == NULL)
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@ -224,22 +250,28 @@ static int pl061_probe(struct amba_device *adev, const struct amba_id *id)
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if (pdata) {
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chip->gc.base = pdata->gpio_base;
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chip->irq_base = pdata->irq_base;
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} else if (adev->dev.of_node) {
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irq_base = pdata->irq_base;
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if (irq_base <= 0)
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return -ENODEV;
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} else {
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chip->gc.base = -1;
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chip->irq_base = 0;
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} else
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return -ENODEV;
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irq_base = 0;
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}
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if (!devm_request_mem_region(dev, adev->res.start,
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resource_size(&adev->res), "pl061"))
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resource_size(&adev->res), "pl061"))
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return -EBUSY;
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chip->base = devm_ioremap(dev, adev->res.start,
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resource_size(&adev->res));
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if (chip->base == NULL)
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resource_size(&adev->res));
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if (!chip->base)
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return -ENOMEM;
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chip->domain = irq_domain_add_simple(adev->dev.of_node, PL061_GPIO_NR,
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irq_base, &pl061_domain_ops, chip);
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if (!chip->domain)
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return -ENODEV;
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spin_lock_init(&chip->lock);
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chip->gc.direction_input = pl061_direction_input;
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@ -259,12 +291,6 @@ static int pl061_probe(struct amba_device *adev, const struct amba_id *id)
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/*
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* irq_chip support
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*/
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if (chip->irq_base <= 0)
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return 0;
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pl061_init_gc(chip, chip->irq_base);
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writeb(0, chip->base + GPIOIE); /* disable irqs */
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irq = adev->irq[0];
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if (irq < 0)
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