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crypto: hisilicon - add sgl_sge_nr module param for zip
Add a module parameter for zip driver to set the number of SGE in one SGL. Signed-off-by: Shukun Tan <tanshukun1@huawei.com> Signed-off-by: Zhou Wang <wangzhou1@hisilicon.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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@ -75,6 +75,8 @@
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#define QM_Q_DEPTH 1024
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#define HISI_ACC_SGL_SGE_NR_MAX 255
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enum qp_state {
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QP_STOP,
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};
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@ -3,9 +3,9 @@
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#include <linux/dma-mapping.h>
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#include <linux/module.h>
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#include <linux/slab.h>
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#include "qm.h"
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#define HISI_ACC_SGL_SGE_NR_MIN 1
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#define HISI_ACC_SGL_SGE_NR_MAX 255
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#define HISI_ACC_SGL_NR_MAX 256
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#define HISI_ACC_SGL_ALIGN_SIZE 64
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@ -79,6 +79,30 @@ struct hisi_zip_ctx {
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struct hisi_zip_qp_ctx qp_ctx[HZIP_CTX_Q_NUM];
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};
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static int sgl_sge_nr_set(const char *val, const struct kernel_param *kp)
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{
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int ret;
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u16 n;
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if (!val)
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return -EINVAL;
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ret = kstrtou16(val, 10, &n);
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if (ret || n == 0 || n > HISI_ACC_SGL_SGE_NR_MAX)
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return -EINVAL;
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return param_set_int(val, kp);
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}
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static const struct kernel_param_ops sgl_sge_nr_ops = {
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.set = sgl_sge_nr_set,
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.get = param_get_int,
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};
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static u16 sgl_sge_nr = HZIP_SGL_SGE_NR;
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module_param_cb(sgl_sge_nr, &sgl_sge_nr_ops, &sgl_sge_nr, 0444);
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MODULE_PARM_DESC(sgl_sge_nr, "Number of sge in sgl(1-255)");
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static void hisi_zip_config_buf_type(struct hisi_zip_sqe *sqe, u8 buf_type)
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{
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u32 val;
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@ -273,7 +297,7 @@ static int hisi_zip_create_sgl_pool(struct hisi_zip_ctx *ctx)
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tmp = &ctx->qp_ctx[i];
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dev = &tmp->qp->qm->pdev->dev;
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tmp->sgl_pool = hisi_acc_create_sgl_pool(dev, QM_Q_DEPTH << 1,
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HZIP_SGL_SGE_NR);
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sgl_sge_nr);
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if (IS_ERR(tmp->sgl_pool)) {
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if (i == 1)
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goto err_free_sgl_pool0;
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