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KVM: PPC: Book3S HV: Don't set DABR on POWER8
POWER8 doesn't have the DABR and DABRX registers; instead it has new DAWR/DAWRX registers, which will be handled in a later patch. Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Paul Mackerras <paulus@samba.org> Signed-off-by: Alexander Graf <agraf@suse.de>
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@ -57,9 +57,11 @@ BEGIN_FTR_SECTION
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std r3, HSTATE_DSCR(r13)
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END_FTR_SECTION_IFSET(CPU_FTR_ARCH_206)
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BEGIN_FTR_SECTION
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/* Save host DABR */
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mfspr r3, SPRN_DABR
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std r3, HSTATE_DABR(r13)
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END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_207S)
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/* Hard-disable interrupts */
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mfmsr r10
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@ -61,11 +61,13 @@ kvmppc_call_hv_entry:
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/* Back from guest - restore host state and return to caller */
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BEGIN_FTR_SECTION
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/* Restore host DABR and DABRX */
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ld r5,HSTATE_DABR(r13)
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li r6,7
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mtspr SPRN_DABR,r5
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mtspr SPRN_DABRX,r6
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END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_207S)
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/* Restore SPRG3 */
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ld r3,PACA_SPRG3(r13)
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@ -284,15 +286,17 @@ kvmppc_hv_entry:
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std r0, PPC_LR_STKOFF(r1)
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stdu r1, -112(r1)
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BEGIN_FTR_SECTION
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/* Set partition DABR */
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/* Do this before re-enabling PMU to avoid P7 DABR corruption bug */
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li r5,3
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ld r6,VCPU_DABR(r4)
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mtspr SPRN_DABRX,r5
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mtspr SPRN_DABR,r6
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BEGIN_FTR_SECTION
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BEGIN_FTR_SECTION_NESTED(89)
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isync
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END_FTR_SECTION_IFSET(CPU_FTR_ARCH_206)
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END_FTR_SECTION_NESTED(CPU_FTR_ARCH_206, CPU_FTR_ARCH_206, 89)
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END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_207S)
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/* Load guest PMU registers */
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/* R4 is live here (vcpu pointer) */
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@ -1609,6 +1613,9 @@ ignore_hdec:
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b fast_guest_return
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_GLOBAL(kvmppc_h_set_dabr)
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BEGIN_FTR_SECTION
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b 2f
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END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
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std r4,VCPU_DABR(r3)
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/* Work around P7 bug where DABR can get corrupted on mtspr */
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1: mtspr SPRN_DABR,r4
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@ -1616,7 +1623,7 @@ _GLOBAL(kvmppc_h_set_dabr)
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cmpd r4, r5
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bne 1b
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isync
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li r3,0
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2: li r3,0
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blr
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_GLOBAL(kvmppc_h_cede)
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