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random: use registers from interrupted code for CPU's w/o a cycle counter
For CPU's that don't have a cycle counter, or something equivalent which can be used for random_get_entropy(), random_get_entropy() will always return 0. In that case, substitute with the saved interrupt registers to add a bit more unpredictability. Some folks have suggested hashing all of the registers unconditionally, but this would increase the overhead of add_interrupt_randomness() by at least an order of magnitude, and this would very likely be unacceptable. The changes in this commit have been benchmarked as mostly unaffecting the overhead of add_interrupt_randomness() if the entropy counter is present, and doubling the overhead if it is not present. Signed-off-by: Theodore Ts'o <tytso@mit.edu> Cc: Jörn Engel <joern@logfs.org>
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@ -551,9 +551,8 @@ static void mix_pool_bytes(struct entropy_store *r, const void *in,
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struct fast_pool {
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__u32 pool[4];
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unsigned long last;
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unsigned short reg_idx;
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unsigned char count;
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unsigned char notimer_count;
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unsigned char rotate;
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};
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/*
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@ -857,6 +856,17 @@ static void add_interrupt_bench(cycles_t start)
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#define add_interrupt_bench(x)
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#endif
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static __u32 get_reg(struct fast_pool *f, struct pt_regs *regs)
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{
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__u32 *ptr = (__u32 *) regs;
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if (regs == NULL)
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return 0;
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if (f->reg_idx >= sizeof(struct pt_regs) / sizeof(__u32))
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f->reg_idx = 0;
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return *(ptr + f->reg_idx++);
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}
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void add_interrupt_randomness(int irq, int irq_flags)
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{
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struct entropy_store *r;
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@ -869,28 +879,23 @@ void add_interrupt_randomness(int irq, int irq_flags)
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unsigned long seed;
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int credit = 0;
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if (cycles == 0)
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cycles = get_reg(fast_pool, regs);
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c_high = (sizeof(cycles) > 4) ? cycles >> 32 : 0;
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j_high = (sizeof(now) > 4) ? now >> 32 : 0;
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fast_pool->pool[0] ^= cycles ^ j_high ^ irq;
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fast_pool->pool[1] ^= now ^ c_high;
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ip = regs ? instruction_pointer(regs) : _RET_IP_;
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fast_pool->pool[2] ^= ip;
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fast_pool->pool[3] ^= ip >> 32;
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fast_pool->pool[3] ^= (sizeof(ip) > 4) ? ip >> 32 :
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get_reg(fast_pool, regs);
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fast_mix(fast_pool);
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if ((irq_flags & __IRQF_TIMER) == 0)
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fast_pool->notimer_count++;
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add_interrupt_bench(cycles);
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if (cycles) {
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if ((fast_pool->count < 64) &&
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!time_after(now, fast_pool->last + HZ))
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return;
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} else {
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/* CPU does not have a cycle counting register :-( */
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if (fast_pool->count < 64)
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return;
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}
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if ((fast_pool->count < 64) &&
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!time_after(now, fast_pool->last + HZ))
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return;
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r = nonblocking_pool.initialized ? &input_pool : &nonblocking_pool;
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if (!spin_trylock(&r->lock))
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@ -910,18 +915,10 @@ void add_interrupt_randomness(int irq, int irq_flags)
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}
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spin_unlock(&r->lock);
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/*
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* If we have a valid cycle counter or if the majority of
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* interrupts collected were non-timer interrupts, then give
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* an entropy credit of 1 bit. Yes, this is being very
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* conservative.
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*/
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if (cycles || (fast_pool->notimer_count >= 32))
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credit++;
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fast_pool->count = 0;
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fast_pool->count = fast_pool->notimer_count = 0;
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credit_entropy_bits(r, credit);
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/* award one bit for the contents of the fast pool */
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credit_entropy_bits(r, credit + 1);
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}
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#ifdef CONFIG_BLOCK
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