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drm/amdgpu: keep the PTs validation list in the VM v2
This avoids allocating it on the fly. v2: fix grammar in comment Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
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@ -917,8 +917,8 @@ struct amdgpu_ring {
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#define AMDGPU_VM_FAULT_STOP_ALWAYS 2
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struct amdgpu_vm_pt {
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struct amdgpu_bo *bo;
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uint64_t addr;
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struct amdgpu_bo_list_entry entry;
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uint64_t addr;
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};
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struct amdgpu_vm_id {
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@ -983,8 +983,7 @@ void amdgpu_vm_fini(struct amdgpu_device *adev, struct amdgpu_vm *vm);
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void amdgpu_vm_get_pd_bo(struct amdgpu_vm *vm,
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struct list_head *validated,
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struct amdgpu_bo_list_entry *entry);
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struct amdgpu_bo_list_entry *amdgpu_vm_get_pt_bos(struct amdgpu_vm *vm,
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struct list_head *duplicates);
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void amdgpu_vm_get_pt_bos(struct amdgpu_vm *vm, struct list_head *duplicates);
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int amdgpu_vm_grab_id(struct amdgpu_vm *vm, struct amdgpu_ring *ring,
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struct amdgpu_sync *sync);
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void amdgpu_vm_flush(struct amdgpu_ring *ring,
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@ -1255,7 +1254,6 @@ struct amdgpu_cs_parser {
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struct amdgpu_cs_chunk *chunks;
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/* relocations */
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struct amdgpu_bo_list_entry vm_pd;
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struct amdgpu_bo_list_entry *vm_bos;
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struct list_head validated;
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struct fence *fence;
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@ -396,11 +396,7 @@ static int amdgpu_cs_parser_relocs(struct amdgpu_cs_parser *p)
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if (unlikely(r != 0))
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goto error_reserve;
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p->vm_bos = amdgpu_vm_get_pt_bos(&fpriv->vm, &duplicates);
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if (!p->vm_bos) {
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r = -ENOMEM;
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goto error_validate;
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}
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amdgpu_vm_get_pt_bos(&fpriv->vm, &duplicates);
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r = amdgpu_cs_list_validate(p->adev, &fpriv->vm, &p->validated);
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if (r)
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@ -483,7 +479,6 @@ static void amdgpu_cs_parser_fini(struct amdgpu_cs_parser *parser, int error, bo
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if (parser->bo_list)
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amdgpu_bo_list_put(parser->bo_list);
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drm_free_large(parser->vm_bos);
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for (i = 0; i < parser->nchunks; i++)
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drm_free_large(parser->chunks[i].kdata);
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kfree(parser->chunks);
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@ -447,7 +447,6 @@ static void amdgpu_gem_va_update_vm(struct amdgpu_device *adev,
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struct amdgpu_bo_va *bo_va, uint32_t operation)
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{
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struct ttm_validate_buffer tv, *entry;
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struct amdgpu_bo_list_entry *vm_bos;
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struct amdgpu_bo_list_entry vm_pd;
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struct ww_acquire_ctx ticket;
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struct list_head list, duplicates;
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@ -468,12 +467,7 @@ static void amdgpu_gem_va_update_vm(struct amdgpu_device *adev,
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if (r)
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goto error_print;
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vm_bos = amdgpu_vm_get_pt_bos(bo_va->vm, &duplicates);
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if (!vm_bos) {
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r = -ENOMEM;
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goto error_unreserve;
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}
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amdgpu_vm_get_pt_bos(bo_va->vm, &duplicates);
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list_for_each_entry(entry, &list, head) {
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domain = amdgpu_mem_type_to_domain(entry->bo->mem.mem_type);
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/* if anything is swapped out don't swap it in here,
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@ -494,7 +488,6 @@ static void amdgpu_gem_va_update_vm(struct amdgpu_device *adev,
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error_unreserve:
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ttm_eu_backoff_reservation(&ticket, &list);
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drm_free_large(vm_bos);
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error_print:
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if (r && r != -ERESTARTSYS)
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@ -98,40 +98,27 @@ void amdgpu_vm_get_pd_bo(struct amdgpu_vm *vm,
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}
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/**
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* amdgpu_vm_get_bos - add the vm BOs to a validation list
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* amdgpu_vm_get_bos - add the vm BOs to a duplicates list
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*
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* @vm: vm providing the BOs
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* @duplicates: head of duplicates list
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*
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* Add the page directory to the list of BOs to
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* validate for command submission (cayman+).
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* Add the page directory to the BO duplicates list
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* for command submission.
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*/
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struct amdgpu_bo_list_entry *amdgpu_vm_get_pt_bos(struct amdgpu_vm *vm,
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struct list_head *duplicates)
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void amdgpu_vm_get_pt_bos(struct amdgpu_vm *vm, struct list_head *duplicates)
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{
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struct amdgpu_bo_list_entry *list;
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unsigned i, idx;
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list = drm_malloc_ab(vm->max_pde_used + 1,
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sizeof(struct amdgpu_bo_list_entry));
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if (!list)
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return NULL;
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unsigned i;
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/* add the vm page table to the list */
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for (i = 0, idx = 0; i <= vm->max_pde_used; i++) {
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if (!vm->page_tables[i].bo)
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for (i = 0; i <= vm->max_pde_used; ++i) {
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struct amdgpu_bo_list_entry *entry = &vm->page_tables[i].entry;
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if (!entry->robj)
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continue;
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list[idx].robj = vm->page_tables[i].bo;
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list[idx].prefered_domains = AMDGPU_GEM_DOMAIN_VRAM;
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list[idx].allowed_domains = AMDGPU_GEM_DOMAIN_VRAM;
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list[idx].priority = 0;
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list[idx].tv.bo = &list[idx].robj->tbo;
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list[idx].tv.shared = true;
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list_add(&list[idx++].tv.head, duplicates);
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list_add(&entry->tv.head, duplicates);
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}
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return list;
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}
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/**
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@ -474,7 +461,7 @@ int amdgpu_vm_update_page_directory(struct amdgpu_device *adev,
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/* walk over the address space and update the page directory */
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for (pt_idx = 0; pt_idx <= vm->max_pde_used; ++pt_idx) {
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struct amdgpu_bo *bo = vm->page_tables[pt_idx].bo;
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struct amdgpu_bo *bo = vm->page_tables[pt_idx].entry.robj;
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uint64_t pde, pt;
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if (bo == NULL)
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@ -651,7 +638,7 @@ static int amdgpu_vm_update_ptes(struct amdgpu_device *adev,
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/* walk over the address space and update the page tables */
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for (addr = start; addr < end; ) {
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uint64_t pt_idx = addr >> amdgpu_vm_block_size;
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struct amdgpu_bo *pt = vm->page_tables[pt_idx].bo;
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struct amdgpu_bo *pt = vm->page_tables[pt_idx].entry.robj;
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unsigned nptes;
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uint64_t pte;
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int r;
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@ -1083,9 +1070,11 @@ int amdgpu_vm_bo_map(struct amdgpu_device *adev,
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/* walk over the address space and allocate the page tables */
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for (pt_idx = saddr; pt_idx <= eaddr; ++pt_idx) {
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struct reservation_object *resv = vm->page_directory->tbo.resv;
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struct amdgpu_bo_list_entry *entry;
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struct amdgpu_bo *pt;
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if (vm->page_tables[pt_idx].bo)
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entry = &vm->page_tables[pt_idx].entry;
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if (entry->robj)
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continue;
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r = amdgpu_bo_create(adev, AMDGPU_VM_PTE_COUNT * 8,
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@ -1102,8 +1091,13 @@ int amdgpu_vm_bo_map(struct amdgpu_device *adev,
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goto error_free;
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}
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entry->robj = pt;
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entry->prefered_domains = AMDGPU_GEM_DOMAIN_VRAM;
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entry->allowed_domains = AMDGPU_GEM_DOMAIN_VRAM;
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entry->priority = 0;
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entry->tv.bo = &entry->robj->tbo;
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entry->tv.shared = true;
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vm->page_tables[pt_idx].addr = 0;
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vm->page_tables[pt_idx].bo = pt;
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}
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return 0;
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@ -1334,7 +1328,7 @@ void amdgpu_vm_fini(struct amdgpu_device *adev, struct amdgpu_vm *vm)
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}
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for (i = 0; i < amdgpu_vm_num_pdes(adev); i++)
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amdgpu_bo_unref(&vm->page_tables[i].bo);
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amdgpu_bo_unref(&vm->page_tables[i].entry.robj);
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kfree(vm->page_tables);
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amdgpu_bo_unref(&vm->page_directory);
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