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igb: fix PHY config access on 82580
82580 NICs can have up to 4 functions. This fixes phy accesses to use the correct locks for functions 2 and 3. Signed-off-by: Nicholas Nunley <nicholasx.d.nunley@intel.com> Tested-by: Jeff Pieper <jeffrey.e.pieper@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -295,6 +295,10 @@ static s32 igb_acquire_phy_82575(struct e1000_hw *hw)
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if (hw->bus.func == E1000_FUNC_1)
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mask = E1000_SWFW_PHY1_SM;
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else if (hw->bus.func == E1000_FUNC_2)
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mask = E1000_SWFW_PHY2_SM;
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else if (hw->bus.func == E1000_FUNC_3)
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mask = E1000_SWFW_PHY3_SM;
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return igb_acquire_swfw_sync_82575(hw, mask);
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}
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@ -312,6 +316,10 @@ static void igb_release_phy_82575(struct e1000_hw *hw)
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if (hw->bus.func == E1000_FUNC_1)
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mask = E1000_SWFW_PHY1_SM;
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else if (hw->bus.func == E1000_FUNC_2)
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mask = E1000_SWFW_PHY2_SM;
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else if (hw->bus.func == E1000_FUNC_3)
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mask = E1000_SWFW_PHY3_SM;
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igb_release_swfw_sync_82575(hw, mask);
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}
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@ -164,6 +164,8 @@
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#define E1000_SWFW_EEP_SM 0x1
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#define E1000_SWFW_PHY0_SM 0x2
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#define E1000_SWFW_PHY1_SM 0x4
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#define E1000_SWFW_PHY2_SM 0x20
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#define E1000_SWFW_PHY3_SM 0x40
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/* FACTPS Definitions */
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/* Device Control */
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