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ARM: S3C64XX: Gate some more clocks by default
Gate the AC'97 and CF clocks by default. The drivers will enable them required. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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@ -201,6 +201,15 @@ static struct clk init_clocks_off[] = {
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.parent = &clk_48m,
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.enable = s3c64xx_sclk_ctrl,
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.ctrlbit = S3C_CLKCON_SCLK_MMC2_48,
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}, {
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.name = "ac97",
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.parent = &clk_p,
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.ctrlbit = S3C_CLKCON_PCLK_AC97,
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}, {
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.name = "cfcon",
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.parent = &clk_h,
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.enable = s3c64xx_hclk_ctrl,
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.ctrlbit = S3C_CLKCON_HCLK_IHOST,
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}, {
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.name = "dma0",
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.parent = &clk_h,
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@ -284,16 +293,7 @@ static struct clk init_clocks[] = {
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.name = "watchdog",
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.parent = &clk_p,
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.ctrlbit = S3C_CLKCON_PCLK_WDT,
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}, {
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.name = "ac97",
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.parent = &clk_p,
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.ctrlbit = S3C_CLKCON_PCLK_AC97,
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}, {
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.name = "cfcon",
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.parent = &clk_h,
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.enable = s3c64xx_hclk_ctrl,
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.ctrlbit = S3C_CLKCON_HCLK_IHOST,
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}
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},
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};
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static struct clk clk_hsmmc0 = {
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