From ecf51c9fa0960fd25cd66f2280fb1980b0d2e300 Mon Sep 17 00:00:00 2001 From: Vineet Gupta Date: Wed, 6 May 2020 14:41:12 -0700 Subject: [PATCH] ARC: xchg: !LLSC: remove UP micro-optimization/hack It gets in the way of cleaning things up and is a maintenance pain-in-neck ! Acked-by: Peter Zijlstra (Intel) Signed-off-by: Vineet Gupta --- arch/arc/include/asm/cmpxchg.h | 8 +------- 1 file changed, 1 insertion(+), 7 deletions(-) diff --git a/arch/arc/include/asm/cmpxchg.h b/arch/arc/include/asm/cmpxchg.h index d42917e803e1..f9564dbe39b7 100644 --- a/arch/arc/include/asm/cmpxchg.h +++ b/arch/arc/include/asm/cmpxchg.h @@ -113,15 +113,9 @@ static inline unsigned long __xchg(unsigned long val, volatile void *ptr, * - For !LLSC, cmpxchg() needs to use that lock (see above) and there is lot * of kernel code which calls xchg()/cmpxchg() on same data (see llist.h) * Hence xchg() needs to follow same locking rules. - * - * Technically the lock is also needed for UP (boils down to irq save/restore) - * but we can cheat a bit since cmpxchg() atomic_ops_lock() would cause irqs to - * be disabled thus can't possibly be interrupted/preempted/clobbered by xchg() - * Other way around, xchg is one instruction anyways, so can't be interrupted - * as such */ -#if !defined(CONFIG_ARC_HAS_LLSC) && defined(CONFIG_SMP) +#ifndef CONFIG_ARC_HAS_LLSC #define arch_xchg(ptr, with) \ ({ \