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MIPS: octeon: Remove cpu_has_saa
The cpu_has_saa feature macro was added along with Cavium Octeon CPU
support back in commit 5b3b16880f
("MIPS: Add Cavium OCTEON processor
support files to arch/mips/cavium-octeon.") but has never been used.
Remove the dead code.
Signed-off-by: Paul Burton <paul.burton@mips.com>
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parent
053951dda7
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@ -45,7 +45,6 @@
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#define cpu_has_ic_fills_f_dc 0
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#define cpu_has_64bits 1
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#define cpu_has_octeon_cache 1
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#define cpu_has_saa octeon_has_saa()
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#define cpu_has_mips32r1 1
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#define cpu_has_mips32r2 1
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#define cpu_has_mips64r1 1
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@ -73,13 +72,6 @@
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#define ARCH_HAS_USABLE_BUILTIN_POPCOUNT 1
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#endif
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static inline int octeon_has_saa(void)
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{
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int id;
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asm volatile ("mfc0 %0, $15,0" : "=r" (id));
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return id >= 0x000d0300;
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}
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/*
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* The last 256MB are reserved for device to device mappings and the
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* BAR1 hole.
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