MIPS: octeon: Remove cpu_has_saa

The cpu_has_saa feature macro was added along with Cavium Octeon CPU
support back in commit 5b3b16880f ("MIPS: Add Cavium OCTEON processor
support files to arch/mips/cavium-octeon.") but has never been used.

Remove the dead code.

Signed-off-by: Paul Burton <paul.burton@mips.com>
This commit is contained in:
Paul Burton 2019-08-06 12:43:20 -07:00
parent 053951dda7
commit ece51529a4
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@ -45,7 +45,6 @@
#define cpu_has_ic_fills_f_dc 0
#define cpu_has_64bits 1
#define cpu_has_octeon_cache 1
#define cpu_has_saa octeon_has_saa()
#define cpu_has_mips32r1 1
#define cpu_has_mips32r2 1
#define cpu_has_mips64r1 1
@ -73,13 +72,6 @@
#define ARCH_HAS_USABLE_BUILTIN_POPCOUNT 1
#endif
static inline int octeon_has_saa(void)
{
int id;
asm volatile ("mfc0 %0, $15,0" : "=r" (id));
return id >= 0x000d0300;
}
/*
* The last 256MB are reserved for device to device mappings and the
* BAR1 hole.