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net/mlx5e: Keep a separate MKey for striding RQ
Currently, rq->mkey_be keeps a big-endian value of either the PA MKey (for legacy RQ, no address translation) or MTT MKey (for striding RQ, direct address translation). Striding RQ stores the same value in rq->umr_mkey in the native endianness. The next commit will make striding RQ use KSM MKey (indirect address translation) for the unaligned mode of XSK, which will require storing both KSM MKey and PA MKey in the RQ struct. This commit optimizes fields of mlx5e_rq: umr_mkey is removed (it's redundant), mkey_be always points to the PA MKey, and mpwqe.umr_mkey_be points to the MTT MKey (or to the KSM MKey, starting from the next commit). Signed-off-by: Maxim Mikityanskiy <maximmi@nvidia.com> Reviewed-by: Saeed Mahameed <saeedm@nvidia.com> Reviewed-by: Tariq Toukan <tariqt@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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@ -696,6 +696,7 @@ struct mlx5e_rq {
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struct mlx5e_umr_wqe umr_wqe;
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struct mlx5e_mpw_info *info;
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mlx5e_fp_skb_from_cqe_mpwrq skb_from_cqe_mpwrq;
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__be32 umr_mkey_be;
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u16 num_strides;
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u16 actual_wq_head;
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u8 log_stride_sz;
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@ -757,7 +758,6 @@ struct mlx5e_rq {
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u32 rqn;
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struct mlx5_core_dev *mdev;
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struct mlx5e_channel *channel;
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u32 umr_mkey;
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struct mlx5e_dma_info wqe_overflow;
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/* XDP read-mostly */
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@ -215,7 +215,7 @@ static inline void mlx5e_build_umr_wqe(struct mlx5e_rq *rq,
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cseg->qpn_ds = cpu_to_be32((sq->sqn << MLX5_WQE_CTRL_QPN_SHIFT) |
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ds_cnt);
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cseg->umr_mkey = rq->mkey_be;
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cseg->umr_mkey = rq->mpwqe.umr_mkey_be;
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ucseg->flags = MLX5_UMR_TRANSLATION_OFFSET_EN | MLX5_UMR_INLINE;
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ucseg->xlt_octowords =
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@ -365,9 +365,13 @@ static int mlx5e_create_umr_klm_mkey(struct mlx5_core_dev *mdev,
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static int mlx5e_create_rq_umr_mkey(struct mlx5_core_dev *mdev, struct mlx5e_rq *rq)
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{
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u64 num_mtts = mlx5_wq_ll_get_size(&rq->mpwqe.wq) * rq->mpwqe.mtts_per_wqe;
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u32 umr_mkey;
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int err;
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return mlx5e_create_umr_mtt_mkey(mdev, num_mtts, rq->mpwqe.page_shift,
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&rq->umr_mkey, rq->wqe_overflow.addr);
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err = mlx5e_create_umr_mtt_mkey(mdev, num_mtts, rq->mpwqe.page_shift,
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&umr_mkey, rq->wqe_overflow.addr);
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rq->mpwqe.umr_mkey_be = cpu_to_be32(umr_mkey);
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return err;
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}
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static int mlx5e_create_rq_hd_umr_mkey(struct mlx5_core_dev *mdev,
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@ -575,6 +579,8 @@ static int mlx5e_alloc_rq(struct mlx5e_params *params,
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rq->buff.headroom = mlx5e_get_rq_headroom(mdev, params, xsk);
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pool_size = 1 << params->log_rq_mtu_frames;
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rq->mkey_be = cpu_to_be32(mdev->mlx5e_res.hw_objs.mkey);
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switch (rq->wq_type) {
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case MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ:
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err = mlx5_wq_ll_create(mdev, &rqp->wq, rqc_wq, &rq->mpwqe.wq,
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@ -611,7 +617,6 @@ static int mlx5e_alloc_rq(struct mlx5e_params *params,
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err = mlx5e_create_rq_umr_mkey(mdev, rq);
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if (err)
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goto err_rq_drop_page;
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rq->mkey_be = cpu_to_be32(rq->umr_mkey);
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err = mlx5e_rq_alloc_mpwqe_info(rq, node);
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if (err)
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@ -647,8 +652,6 @@ static int mlx5e_alloc_rq(struct mlx5e_params *params,
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err = mlx5e_init_di_list(rq, wq_sz, node);
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if (err)
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goto err_rq_frags;
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rq->mkey_be = cpu_to_be32(mdev->mlx5e_res.hw_objs.mkey);
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}
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if (xsk) {
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@ -695,7 +698,7 @@ static int mlx5e_alloc_rq(struct mlx5e_params *params,
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wqe->data[0].addr = cpu_to_be64(dma_offset + headroom);
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wqe->data[0].byte_count = cpu_to_be32(byte_count);
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wqe->data[0].lkey = rq->mkey_be;
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wqe->data[0].lkey = rq->mpwqe.umr_mkey_be;
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} else {
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struct mlx5e_rx_wqe_cyc *wqe =
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mlx5_wq_cyc_get_wqe(&rq->wqe.wq, i);
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@ -740,7 +743,7 @@ err_free_by_rq_type:
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case MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ:
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kvfree(rq->mpwqe.info);
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err_rq_mkey:
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mlx5_core_destroy_mkey(mdev, rq->umr_mkey);
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mlx5_core_destroy_mkey(mdev, be32_to_cpu(rq->mpwqe.umr_mkey_be));
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err_rq_drop_page:
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mlx5e_free_mpwqe_rq_drop_page(rq);
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break;
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@ -773,7 +776,7 @@ static void mlx5e_free_rq(struct mlx5e_rq *rq)
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switch (rq->wq_type) {
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case MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ:
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kvfree(rq->mpwqe.info);
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mlx5_core_destroy_mkey(rq->mdev, rq->umr_mkey);
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mlx5_core_destroy_mkey(rq->mdev, be32_to_cpu(rq->mpwqe.umr_mkey_be));
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mlx5e_free_mpwqe_rq_drop_page(rq);
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mlx5e_rq_free_shampo(rq);
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break;
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