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staging: rtl8192u: fix spaces around '=' in r819xU_phy.c
This patch fixes the whitespace around the assignment operator to meet linux kernel coding style. Signed-off-by: Xenia Ragiadakou <burzalodowa@gmail.com> Reviewed-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Xenia Ragiadakou
Greg Kroah-Hartman
parent
000d73fc3b
commit
ec5d319bbf
@ -111,7 +111,7 @@ u32 rtl8192_QueryBBReg(struct net_device *dev, u32 dwRegAddr, u32 dwBitMask)
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read_nic_dword(dev, dwRegAddr, &OriginalValue);
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BitShift = rtl8192_CalculateBitShift(dwBitMask);
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Ret =(OriginalValue & dwBitMask) >> BitShift;
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Ret = (OriginalValue & dwBitMask) >> BitShift;
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return Ret;
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}
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@ -470,7 +470,7 @@ void rtl8192_phy_configmac(struct net_device *dev)
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dwArrayLen = MACPHY_ArrayLength;
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pdwArray = rtl819XMACPHY_Array;
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}
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for (i = 0; i<dwArrayLen; i=i+3) {
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for (i = 0; i<dwArrayLen; i = i+3) {
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if (pdwArray[i] == 0x318) {
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pdwArray[i+2] = 0x00000800;
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}
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@ -506,12 +506,12 @@ void rtl8192_phyConfigBB(struct net_device *dev, u8 ConfigType)
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}
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#endif
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if (ConfigType == BaseBand_Config_PHY_REG) {
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for (i=0; i<PHY_REG_1T2RArrayLength; i+=2) {
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for (i = 0; i<PHY_REG_1T2RArrayLength; i += 2) {
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rtl8192_setBBreg(dev, rtl819XPHY_REG_1T2RArray[i], bMaskDWord, rtl819XPHY_REG_1T2RArray[i+1]);
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RT_TRACE(COMP_DBG, "i: %x, The Rtl819xUsbPHY_REGArray[0] is %x Rtl819xUsbPHY_REGArray[1] is %x \n",i, rtl819XPHY_REG_1T2RArray[i], rtl819XPHY_REG_1T2RArray[i+1]);
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}
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} else if (ConfigType == BaseBand_Config_AGC_TAB) {
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for (i=0; i<AGCTAB_ArrayLength; i+=2) {
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for (i = 0; i<AGCTAB_ArrayLength; i += 2) {
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rtl8192_setBBreg(dev, rtl819XAGCTAB_Array[i], bMaskDWord, rtl819XAGCTAB_Array[i+1]);
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RT_TRACE(COMP_DBG, "i:%x, The rtl819XAGCTAB_Array[0] is %x rtl819XAGCTAB_Array[1] is %x \n",i, rtl819XAGCTAB_Array[i], rtl819XAGCTAB_Array[i+1]);
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}
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@ -656,7 +656,7 @@ u8 rtl8192_phy_checkBBAndRF(struct net_device *dev, HW90_BLOCK_E CheckBlock,
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WriteAddr[HW90_BLOCK_PHY1] = 0x800;
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WriteAddr[HW90_BLOCK_RF] = 0x3;
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RT_TRACE(COMP_PHY, "=======>%s(), CheckBlock:%d\n", __FUNCTION__, CheckBlock);
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for (i=0 ; i < CheckTimes ; i++) {
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for (i = 0 ; i < CheckTimes ; i++) {
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//
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// Write Data to register and readback
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@ -728,7 +728,7 @@ void rtl8192_BB_Config_ParaFile(struct net_device *dev)
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/*----Ckeck FPGAPHY0 and PHY1 board is OK----*/
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// TODO: this function should be removed on ASIC , Emily 2007.2.2
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for (eCheckItem=(HW90_BLOCK_E)HW90_BLOCK_PHY0; eCheckItem<=HW90_BLOCK_PHY1; eCheckItem++) {
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for (eCheckItem = (HW90_BLOCK_E)HW90_BLOCK_PHY0; eCheckItem<=HW90_BLOCK_PHY1; eCheckItem++) {
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rtStatus = rtl8192_phy_checkBBAndRF(dev, (HW90_BLOCK_E)eCheckItem, (RF90_RADIO_PATH_E)0); //don't care RF path
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if (rtStatus != 0) {
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RT_TRACE((COMP_ERR | COMP_PHY), "PHY_RF8256_Config():Check PHY%d Fail!!\n", eCheckItem-1);
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@ -894,7 +894,7 @@ u8 rtl8192_phy_ConfigRFWithHeaderFile(struct net_device *dev,
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switch (eRFPath) {
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case RF90_PATH_A:
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for (i = 0;i<RadioA_ArrayLength; i=i+2) {
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for (i = 0;i<RadioA_ArrayLength; i = i+2) {
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if (rtl819XRadioA_Array[i] == 0xfe) {
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mdelay(100);
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@ -906,7 +906,7 @@ u8 rtl8192_phy_ConfigRFWithHeaderFile(struct net_device *dev,
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}
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break;
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case RF90_PATH_B:
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for (i = 0;i<RadioB_ArrayLength; i=i+2) {
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for (i = 0;i<RadioB_ArrayLength; i = i+2) {
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if (rtl819XRadioB_Array[i] == 0xfe) {
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mdelay(100);
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@ -918,7 +918,7 @@ u8 rtl8192_phy_ConfigRFWithHeaderFile(struct net_device *dev,
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}
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break;
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case RF90_PATH_C:
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for (i = 0;i<RadioC_ArrayLength; i=i+2) {
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for (i = 0;i<RadioC_ArrayLength; i = i+2) {
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if (rtl819XRadioC_Array[i] == 0xfe) {
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mdelay(100);
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@ -930,7 +930,7 @@ u8 rtl8192_phy_ConfigRFWithHeaderFile(struct net_device *dev,
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}
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break;
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case RF90_PATH_D:
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for (i = 0;i<RadioD_ArrayLength; i=i+2) {
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for (i = 0;i<RadioD_ArrayLength; i = i+2) {
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if (rtl819XRadioD_Array[i] == 0xfe) {
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mdelay(100);
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@ -1224,23 +1224,23 @@ u8 rtl8192_phy_SwChnlStepByStep(struct net_device *dev, u8 channel, u8 *stage,
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do {
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switch (*stage) {
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case 0:
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CurrentCmd=&PreCommonCmd[*step];
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CurrentCmd = &PreCommonCmd[*step];
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break;
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case 1:
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CurrentCmd=&RfDependCmd[*step];
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CurrentCmd = &RfDependCmd[*step];
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break;
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case 2:
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CurrentCmd=&PostCommonCmd[*step];
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CurrentCmd = &PostCommonCmd[*step];
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break;
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}
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if (CurrentCmd->CmdID==CmdID_End) {
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if ((*stage)==2) {
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(*delay)=CurrentCmd->msDelay;
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(*delay) = CurrentCmd->msDelay;
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return true;
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} else {
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(*stage)++;
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(*step)=0;
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(*step) = 0;
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continue;
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}
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}
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@ -1271,7 +1271,7 @@ u8 rtl8192_phy_SwChnlStepByStep(struct net_device *dev, u8 channel, u8 *stage,
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break;
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} while (true);
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(*delay)=CurrentCmd->msDelay;
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(*delay) = CurrentCmd->msDelay;
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(*step)++;
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return false;
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}
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@ -1360,10 +1360,10 @@ u8 rtl8192_phy_SwChnl(struct net_device *dev, u8 channel)
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if (channel == 0)
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channel = 1;
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priv->chan=channel;
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priv->chan = channel;
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priv->SwChnlStage=0;
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priv->SwChnlStep=0;
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priv->SwChnlStage = 0;
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priv->SwChnlStep = 0;
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if (priv->up)
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rtl8192_SwChnl_WorkItem(dev);
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@ -1394,7 +1394,7 @@ void rtl8192_SetBWModeWorkItem(struct net_device *dev)
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if (priv->rf_chip == RF_PSEUDO_11N) {
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priv->SetBWModeInProgress= false;
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priv->SetBWModeInProgress = false;
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return;
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}
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@ -1432,7 +1432,7 @@ void rtl8192_SetBWModeWorkItem(struct net_device *dev)
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priv->cck_present_attentuation_20Mdefault + priv->cck_present_attentuation_difference;
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if (priv->cck_present_attentuation > 22)
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priv->cck_present_attentuation= 22;
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priv->cck_present_attentuation = 22;
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if (priv->cck_present_attentuation< 0)
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priv->cck_present_attentuation = 0;
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RT_TRACE(COMP_INIT, "20M, pHalData->CCKPresentAttentuation = %d\n", priv->cck_present_attentuation);
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@ -1506,7 +1506,7 @@ void rtl8192_SetBWModeWorkItem(struct net_device *dev)
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RT_TRACE(COMP_ERR, "Unknown RFChipID: %d\n", priv->rf_chip);
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break;
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}
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priv->SetBWModeInProgress= false;
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priv->SetBWModeInProgress = false;
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RT_TRACE(COMP_SWBW, "<==SetBWMode819xUsb(), %d", atomic_read(&(priv->ieee80211->atm_swbw)));
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}
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@ -1528,7 +1528,7 @@ void rtl8192_SetBWMode(struct net_device *dev, HT_CHANNEL_WIDTH Bandwidth,
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if (priv->SetBWModeInProgress)
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return;
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priv->SetBWModeInProgress= true;
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priv->SetBWModeInProgress = true;
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priv->CurrentChannelBW = Bandwidth;
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