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intel: switch from 'pci_' to 'dma_' API
The wrappers in include/linux/pci-dma-compat.h should go away. The patch has been generated with the coccinelle script below. It has been hand modified to use 'dma_set_mask_and_coherent()' instead of 'pci_set_dma_mask()/pci_set_consistent_dma_mask()' when applicable. This is less verbose. It has been compile tested. @@ @@ - PCI_DMA_BIDIRECTIONAL + DMA_BIDIRECTIONAL @@ @@ - PCI_DMA_TODEVICE + DMA_TO_DEVICE @@ @@ - PCI_DMA_FROMDEVICE + DMA_FROM_DEVICE @@ @@ - PCI_DMA_NONE + DMA_NONE @@ expression e1, e2, e3; @@ - pci_alloc_consistent(e1, e2, e3) + dma_alloc_coherent(&e1->dev, e2, e3, GFP_) @@ expression e1, e2, e3; @@ - pci_zalloc_consistent(e1, e2, e3) + dma_alloc_coherent(&e1->dev, e2, e3, GFP_) @@ expression e1, e2, e3, e4; @@ - pci_free_consistent(e1, e2, e3, e4) + dma_free_coherent(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_map_single(e1, e2, e3, e4) + dma_map_single(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_unmap_single(e1, e2, e3, e4) + dma_unmap_single(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4, e5; @@ - pci_map_page(e1, e2, e3, e4, e5) + dma_map_page(&e1->dev, e2, e3, e4, e5) @@ expression e1, e2, e3, e4; @@ - pci_unmap_page(e1, e2, e3, e4) + dma_unmap_page(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_map_sg(e1, e2, e3, e4) + dma_map_sg(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_unmap_sg(e1, e2, e3, e4) + dma_unmap_sg(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_dma_sync_single_for_cpu(e1, e2, e3, e4) + dma_sync_single_for_cpu(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_dma_sync_single_for_device(e1, e2, e3, e4) + dma_sync_single_for_device(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_dma_sync_sg_for_cpu(e1, e2, e3, e4) + dma_sync_sg_for_cpu(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_dma_sync_sg_for_device(e1, e2, e3, e4) + dma_sync_sg_for_device(&e1->dev, e2, e3, e4) @@ expression e1, e2; @@ - pci_dma_mapping_error(e1, e2) + dma_mapping_error(&e1->dev, e2) @@ expression e1, e2; @@ - pci_set_dma_mask(e1, e2) + dma_set_mask(&e1->dev, e2) @@ expression e1, e2; @@ - pci_set_consistent_dma_mask(e1, e2) + dma_set_coherent_mask(&e1->dev, e2) Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/f55043d0c847bfae60087707778563cf732a7bf9.1629619229.git.christophe.jaillet@wanadoo.fr
This commit is contained in:
parent
a847666acc
commit
ebe9e6514b
@ -571,20 +571,18 @@ il3945_tx_skb(struct il_priv *il,
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/* Physical address of this Tx command's header (not MAC header!),
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* within command buffer array. */
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txcmd_phys =
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pci_map_single(il->pci_dev, &out_cmd->hdr, firstlen,
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PCI_DMA_TODEVICE);
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if (unlikely(pci_dma_mapping_error(il->pci_dev, txcmd_phys)))
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txcmd_phys = dma_map_single(&il->pci_dev->dev, &out_cmd->hdr, firstlen,
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DMA_TO_DEVICE);
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if (unlikely(dma_mapping_error(&il->pci_dev->dev, txcmd_phys)))
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goto drop_unlock;
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/* Set up TFD's 2nd entry to point directly to remainder of skb,
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* if any (802.11 null frames have no payload). */
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secondlen = skb->len - hdr_len;
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if (secondlen > 0) {
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phys_addr =
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pci_map_single(il->pci_dev, skb->data + hdr_len, secondlen,
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PCI_DMA_TODEVICE);
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if (unlikely(pci_dma_mapping_error(il->pci_dev, phys_addr)))
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phys_addr = dma_map_single(&il->pci_dev->dev, skb->data + hdr_len,
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secondlen, DMA_TO_DEVICE);
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if (unlikely(dma_mapping_error(&il->pci_dev->dev, phys_addr)))
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goto drop_unlock;
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}
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@ -1015,11 +1013,11 @@ il3945_rx_allocate(struct il_priv *il, gfp_t priority)
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/* Get physical address of RB/SKB */
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page_dma =
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pci_map_page(il->pci_dev, page, 0,
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dma_map_page(&il->pci_dev->dev, page, 0,
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PAGE_SIZE << il->hw_params.rx_page_order,
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PCI_DMA_FROMDEVICE);
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DMA_FROM_DEVICE);
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if (unlikely(pci_dma_mapping_error(il->pci_dev, page_dma))) {
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if (unlikely(dma_mapping_error(&il->pci_dev->dev, page_dma))) {
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__free_pages(page, il->hw_params.rx_page_order);
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break;
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}
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@ -1028,9 +1026,9 @@ il3945_rx_allocate(struct il_priv *il, gfp_t priority)
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if (list_empty(&rxq->rx_used)) {
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spin_unlock_irqrestore(&rxq->lock, flags);
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pci_unmap_page(il->pci_dev, page_dma,
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dma_unmap_page(&il->pci_dev->dev, page_dma,
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PAGE_SIZE << il->hw_params.rx_page_order,
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PCI_DMA_FROMDEVICE);
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DMA_FROM_DEVICE);
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__free_pages(page, il->hw_params.rx_page_order);
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return;
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}
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@ -1062,9 +1060,10 @@ il3945_rx_queue_reset(struct il_priv *il, struct il_rx_queue *rxq)
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/* In the reset function, these buffers may have been allocated
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* to an SKB, so we need to unmap and free potential storage */
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if (rxq->pool[i].page != NULL) {
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pci_unmap_page(il->pci_dev, rxq->pool[i].page_dma,
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dma_unmap_page(&il->pci_dev->dev,
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rxq->pool[i].page_dma,
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PAGE_SIZE << il->hw_params.rx_page_order,
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PCI_DMA_FROMDEVICE);
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DMA_FROM_DEVICE);
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__il_free_pages(il, rxq->pool[i].page);
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rxq->pool[i].page = NULL;
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}
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@ -1111,9 +1110,10 @@ il3945_rx_queue_free(struct il_priv *il, struct il_rx_queue *rxq)
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int i;
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for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
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if (rxq->pool[i].page != NULL) {
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pci_unmap_page(il->pci_dev, rxq->pool[i].page_dma,
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dma_unmap_page(&il->pci_dev->dev,
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rxq->pool[i].page_dma,
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PAGE_SIZE << il->hw_params.rx_page_order,
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PCI_DMA_FROMDEVICE);
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DMA_FROM_DEVICE);
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__il_free_pages(il, rxq->pool[i].page);
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rxq->pool[i].page = NULL;
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}
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@ -1213,9 +1213,9 @@ il3945_rx_handle(struct il_priv *il)
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rxq->queue[i] = NULL;
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pci_unmap_page(il->pci_dev, rxb->page_dma,
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dma_unmap_page(&il->pci_dev->dev, rxb->page_dma,
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PAGE_SIZE << il->hw_params.rx_page_order,
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PCI_DMA_FROMDEVICE);
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DMA_FROM_DEVICE);
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pkt = rxb_addr(rxb);
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len = le32_to_cpu(pkt->len_n_flags) & IL_RX_FRAME_SIZE_MSK;
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@ -1260,11 +1260,11 @@ il3945_rx_handle(struct il_priv *il)
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spin_lock_irqsave(&rxq->lock, flags);
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if (rxb->page != NULL) {
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rxb->page_dma =
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pci_map_page(il->pci_dev, rxb->page, 0,
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PAGE_SIZE << il->hw_params.
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rx_page_order, PCI_DMA_FROMDEVICE);
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if (unlikely(pci_dma_mapping_error(il->pci_dev,
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rxb->page_dma))) {
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dma_map_page(&il->pci_dev->dev, rxb->page, 0,
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PAGE_SIZE << il->hw_params.rx_page_order,
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DMA_FROM_DEVICE);
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if (unlikely(dma_mapping_error(&il->pci_dev->dev,
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rxb->page_dma))) {
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__il_free_pages(il, rxb->page);
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rxb->page = NULL;
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list_add_tail(&rxb->list, &rxq->rx_used);
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@ -3616,9 +3616,7 @@ il3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
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pci_set_master(pdev);
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err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
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if (!err)
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err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
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err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
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if (err) {
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IL_WARN("No suitable DMA available.\n");
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goto out_pci_disable_device;
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@ -652,16 +652,16 @@ il3945_hw_txq_free_tfd(struct il_priv *il, struct il_tx_queue *txq)
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/* Unmap tx_cmd */
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if (counter)
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pci_unmap_single(dev, dma_unmap_addr(&txq->meta[idx], mapping),
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dma_unmap_single(&dev->dev,
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dma_unmap_addr(&txq->meta[idx], mapping),
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dma_unmap_len(&txq->meta[idx], len),
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PCI_DMA_TODEVICE);
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DMA_TO_DEVICE);
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/* unmap chunks if any */
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for (i = 1; i < counter; i++)
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pci_unmap_single(dev, le32_to_cpu(tfd->tbs[i].addr),
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le32_to_cpu(tfd->tbs[i].len),
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PCI_DMA_TODEVICE);
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dma_unmap_single(&dev->dev, le32_to_cpu(tfd->tbs[i].addr),
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le32_to_cpu(tfd->tbs[i].len), DMA_TO_DEVICE);
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/* free SKB */
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if (txq->skbs) {
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@ -94,9 +94,10 @@ il4965_rx_queue_reset(struct il_priv *il, struct il_rx_queue *rxq)
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/* In the reset function, these buffers may have been allocated
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* to an SKB, so we need to unmap and free potential storage */
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if (rxq->pool[i].page != NULL) {
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pci_unmap_page(il->pci_dev, rxq->pool[i].page_dma,
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dma_unmap_page(&il->pci_dev->dev,
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rxq->pool[i].page_dma,
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PAGE_SIZE << il->hw_params.rx_page_order,
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PCI_DMA_FROMDEVICE);
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DMA_FROM_DEVICE);
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__il_free_pages(il, rxq->pool[i].page);
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rxq->pool[i].page = NULL;
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}
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@ -342,11 +343,10 @@ il4965_rx_allocate(struct il_priv *il, gfp_t priority)
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}
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/* Get physical address of the RB */
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page_dma =
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pci_map_page(il->pci_dev, page, 0,
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PAGE_SIZE << il->hw_params.rx_page_order,
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PCI_DMA_FROMDEVICE);
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if (unlikely(pci_dma_mapping_error(il->pci_dev, page_dma))) {
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page_dma = dma_map_page(&il->pci_dev->dev, page, 0,
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PAGE_SIZE << il->hw_params.rx_page_order,
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DMA_FROM_DEVICE);
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if (unlikely(dma_mapping_error(&il->pci_dev->dev, page_dma))) {
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__free_pages(page, il->hw_params.rx_page_order);
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break;
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}
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@ -355,9 +355,9 @@ il4965_rx_allocate(struct il_priv *il, gfp_t priority)
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if (list_empty(&rxq->rx_used)) {
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spin_unlock_irqrestore(&rxq->lock, flags);
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pci_unmap_page(il->pci_dev, page_dma,
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dma_unmap_page(&il->pci_dev->dev, page_dma,
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PAGE_SIZE << il->hw_params.rx_page_order,
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PCI_DMA_FROMDEVICE);
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DMA_FROM_DEVICE);
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__free_pages(page, il->hw_params.rx_page_order);
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return;
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}
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@ -409,9 +409,10 @@ il4965_rx_queue_free(struct il_priv *il, struct il_rx_queue *rxq)
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int i;
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for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
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if (rxq->pool[i].page != NULL) {
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pci_unmap_page(il->pci_dev, rxq->pool[i].page_dma,
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dma_unmap_page(&il->pci_dev->dev,
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rxq->pool[i].page_dma,
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PAGE_SIZE << il->hw_params.rx_page_order,
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PCI_DMA_FROMDEVICE);
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DMA_FROM_DEVICE);
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__il_free_pages(il, rxq->pool[i].page);
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rxq->pool[i].page = NULL;
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}
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@ -1815,20 +1816,18 @@ il4965_tx_skb(struct il_priv *il,
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/* Physical address of this Tx command's header (not MAC header!),
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* within command buffer array. */
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txcmd_phys =
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pci_map_single(il->pci_dev, &out_cmd->hdr, firstlen,
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PCI_DMA_BIDIRECTIONAL);
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if (unlikely(pci_dma_mapping_error(il->pci_dev, txcmd_phys)))
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txcmd_phys = dma_map_single(&il->pci_dev->dev, &out_cmd->hdr, firstlen,
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DMA_BIDIRECTIONAL);
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if (unlikely(dma_mapping_error(&il->pci_dev->dev, txcmd_phys)))
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goto drop_unlock;
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/* Set up TFD's 2nd entry to point directly to remainder of skb,
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* if any (802.11 null frames have no payload). */
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secondlen = skb->len - hdr_len;
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if (secondlen > 0) {
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phys_addr =
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pci_map_single(il->pci_dev, skb->data + hdr_len, secondlen,
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PCI_DMA_TODEVICE);
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if (unlikely(pci_dma_mapping_error(il->pci_dev, phys_addr)))
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phys_addr = dma_map_single(&il->pci_dev->dev, skb->data + hdr_len,
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secondlen, DMA_TO_DEVICE);
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if (unlikely(dma_mapping_error(&il->pci_dev->dev, phys_addr)))
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goto drop_unlock;
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}
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@ -1853,8 +1852,8 @@ il4965_tx_skb(struct il_priv *il,
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offsetof(struct il_tx_cmd, scratch);
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/* take back ownership of DMA buffer to enable update */
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pci_dma_sync_single_for_cpu(il->pci_dev, txcmd_phys, firstlen,
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PCI_DMA_BIDIRECTIONAL);
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dma_sync_single_for_cpu(&il->pci_dev->dev, txcmd_phys, firstlen,
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DMA_BIDIRECTIONAL);
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tx_cmd->dram_lsb_ptr = cpu_to_le32(scratch_phys);
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tx_cmd->dram_msb_ptr = il_get_dma_hi_addr(scratch_phys);
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@ -1869,8 +1868,8 @@ il4965_tx_skb(struct il_priv *il,
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if (info->flags & IEEE80211_TX_CTL_AMPDU)
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il->ops->txq_update_byte_cnt_tbl(il, txq, le16_to_cpu(tx_cmd->len));
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pci_dma_sync_single_for_device(il->pci_dev, txcmd_phys, firstlen,
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PCI_DMA_BIDIRECTIONAL);
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dma_sync_single_for_device(&il->pci_dev->dev, txcmd_phys, firstlen,
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DMA_BIDIRECTIONAL);
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/* Tell device the write idx *just past* this latest filled TFD */
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q->write_ptr = il_queue_inc_wrap(q->write_ptr, q->n_bd);
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@ -3929,15 +3928,15 @@ il4965_hw_txq_free_tfd(struct il_priv *il, struct il_tx_queue *txq)
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/* Unmap tx_cmd */
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if (num_tbs)
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pci_unmap_single(dev, dma_unmap_addr(&txq->meta[idx], mapping),
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dma_unmap_single(&dev->dev,
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dma_unmap_addr(&txq->meta[idx], mapping),
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dma_unmap_len(&txq->meta[idx], len),
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PCI_DMA_BIDIRECTIONAL);
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DMA_BIDIRECTIONAL);
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/* Unmap chunks, if any. */
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for (i = 1; i < num_tbs; i++)
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pci_unmap_single(dev, il4965_tfd_tb_get_addr(tfd, i),
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il4965_tfd_tb_get_len(tfd, i),
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PCI_DMA_TODEVICE);
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dma_unmap_single(&dev->dev, il4965_tfd_tb_get_addr(tfd, i),
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il4965_tfd_tb_get_len(tfd, i), DMA_TO_DEVICE);
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/* free SKB */
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if (txq->skbs) {
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@ -4243,9 +4242,9 @@ il4965_rx_handle(struct il_priv *il)
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rxq->queue[i] = NULL;
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pci_unmap_page(il->pci_dev, rxb->page_dma,
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dma_unmap_page(&il->pci_dev->dev, rxb->page_dma,
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PAGE_SIZE << il->hw_params.rx_page_order,
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PCI_DMA_FROMDEVICE);
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DMA_FROM_DEVICE);
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pkt = rxb_addr(rxb);
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len = le32_to_cpu(pkt->len_n_flags) & IL_RX_FRAME_SIZE_MSK;
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@ -4290,12 +4289,12 @@ il4965_rx_handle(struct il_priv *il)
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spin_lock_irqsave(&rxq->lock, flags);
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if (rxb->page != NULL) {
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rxb->page_dma =
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pci_map_page(il->pci_dev, rxb->page, 0,
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PAGE_SIZE << il->hw_params.
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rx_page_order, PCI_DMA_FROMDEVICE);
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dma_map_page(&il->pci_dev->dev, rxb->page, 0,
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PAGE_SIZE << il->hw_params.rx_page_order,
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DMA_FROM_DEVICE);
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if (unlikely(pci_dma_mapping_error(il->pci_dev,
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rxb->page_dma))) {
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if (unlikely(dma_mapping_error(&il->pci_dev->dev,
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rxb->page_dma))) {
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__il_free_pages(il, rxb->page);
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rxb->page = NULL;
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list_add_tail(&rxb->list, &rxq->rx_used);
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@ -6514,14 +6513,9 @@ il4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
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pci_set_master(pdev);
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err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
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if (!err)
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err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
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err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(36));
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if (err) {
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err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
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if (!err)
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err =
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pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
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err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
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/* both attempts failed: */
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if (err) {
|
||||
IL_WARN("No suitable DMA available.\n");
|
||||
|
@ -2819,10 +2819,10 @@ il_cmd_queue_unmap(struct il_priv *il)
|
||||
i = il_get_cmd_idx(q, q->read_ptr, 0);
|
||||
|
||||
if (txq->meta[i].flags & CMD_MAPPED) {
|
||||
pci_unmap_single(il->pci_dev,
|
||||
dma_unmap_single(&il->pci_dev->dev,
|
||||
dma_unmap_addr(&txq->meta[i], mapping),
|
||||
dma_unmap_len(&txq->meta[i], len),
|
||||
PCI_DMA_BIDIRECTIONAL);
|
||||
DMA_BIDIRECTIONAL);
|
||||
txq->meta[i].flags = 0;
|
||||
}
|
||||
|
||||
@ -2831,10 +2831,10 @@ il_cmd_queue_unmap(struct il_priv *il)
|
||||
|
||||
i = q->n_win;
|
||||
if (txq->meta[i].flags & CMD_MAPPED) {
|
||||
pci_unmap_single(il->pci_dev,
|
||||
dma_unmap_single(&il->pci_dev->dev,
|
||||
dma_unmap_addr(&txq->meta[i], mapping),
|
||||
dma_unmap_len(&txq->meta[i], len),
|
||||
PCI_DMA_BIDIRECTIONAL);
|
||||
DMA_BIDIRECTIONAL);
|
||||
txq->meta[i].flags = 0;
|
||||
}
|
||||
}
|
||||
@ -3197,10 +3197,9 @@ il_enqueue_hcmd(struct il_priv *il, struct il_host_cmd *cmd)
|
||||
}
|
||||
#endif
|
||||
|
||||
phys_addr =
|
||||
pci_map_single(il->pci_dev, &out_cmd->hdr, fix_size,
|
||||
PCI_DMA_BIDIRECTIONAL);
|
||||
if (unlikely(pci_dma_mapping_error(il->pci_dev, phys_addr))) {
|
||||
phys_addr = dma_map_single(&il->pci_dev->dev, &out_cmd->hdr, fix_size,
|
||||
DMA_BIDIRECTIONAL);
|
||||
if (unlikely(dma_mapping_error(&il->pci_dev->dev, phys_addr))) {
|
||||
idx = -ENOMEM;
|
||||
goto out;
|
||||
}
|
||||
@ -3298,8 +3297,8 @@ il_tx_cmd_complete(struct il_priv *il, struct il_rx_buf *rxb)
|
||||
|
||||
txq->time_stamp = jiffies;
|
||||
|
||||
pci_unmap_single(il->pci_dev, dma_unmap_addr(meta, mapping),
|
||||
dma_unmap_len(meta, len), PCI_DMA_BIDIRECTIONAL);
|
||||
dma_unmap_single(&il->pci_dev->dev, dma_unmap_addr(meta, mapping),
|
||||
dma_unmap_len(meta, len), DMA_BIDIRECTIONAL);
|
||||
|
||||
/* Input error checking is done when commands are added to queue. */
|
||||
if (meta->flags & CMD_WANT_SKB) {
|
||||
|
@ -3506,15 +3506,9 @@ struct iwl_trans *iwl_trans_pcie_alloc(struct pci_dev *pdev,
|
||||
pci_set_master(pdev);
|
||||
|
||||
addr_size = trans->txqs.tfd.addr_size;
|
||||
ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(addr_size));
|
||||
if (!ret)
|
||||
ret = pci_set_consistent_dma_mask(pdev,
|
||||
DMA_BIT_MASK(addr_size));
|
||||
ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(addr_size));
|
||||
if (ret) {
|
||||
ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
|
||||
if (!ret)
|
||||
ret = pci_set_consistent_dma_mask(pdev,
|
||||
DMA_BIT_MASK(32));
|
||||
ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
|
||||
/* both attempts failed: */
|
||||
if (ret) {
|
||||
dev_err(&pdev->dev, "No suitable DMA available\n");
|
||||
|
Loading…
Reference in New Issue
Block a user