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rtc: mc146818: Dont test for bit 0-5 in Register D
The recent change to validate the RTC turned out to be overly tight.
While it cures the problem on the reporters machine it breaks machines
with Intel chipsets which use bit 0-5 of the D register. So check only
for bit 6 being 0 which is the case on these Intel machines as well.
Fixes: 211e5db19d
("rtc: mc146818: Detect and handle broken RTCs")
Reported-by: Serge Belyshev <belyshev@depni.sinp.msu.ru>
Reported-by: Dirk Gouders <dirk@gouders.net>
Reported-by: Borislav Petkov <bp@suse.de>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Dirk Gouders <dirk@gouders.net>
Tested-by: Len Brown <len.brown@intel.com>
Tested-by: Borislav Petkov <bp@suse.de>
Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Link: https://lore.kernel.org/r/87zh0nbnha.fsf@nanos.tec.linutronix.de
This commit is contained in:
parent
211e5db19d
commit
ebb22a0594
@ -805,8 +805,8 @@ cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq)
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spin_lock_irq(&rtc_lock);
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spin_lock_irq(&rtc_lock);
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/* Ensure that the RTC is accessible. Bit 0-6 must be 0! */
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/* Ensure that the RTC is accessible. Bit 6 must be 0! */
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if ((CMOS_READ(RTC_VALID) & 0x7f) != 0) {
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if ((CMOS_READ(RTC_VALID) & 0x40) != 0) {
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spin_unlock_irq(&rtc_lock);
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spin_unlock_irq(&rtc_lock);
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dev_warn(dev, "not accessible\n");
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dev_warn(dev, "not accessible\n");
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retval = -ENXIO;
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retval = -ENXIO;
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@ -21,8 +21,8 @@ unsigned int mc146818_get_time(struct rtc_time *time)
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again:
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again:
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spin_lock_irqsave(&rtc_lock, flags);
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spin_lock_irqsave(&rtc_lock, flags);
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/* Ensure that the RTC is accessible. Bit 0-6 must be 0! */
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/* Ensure that the RTC is accessible. Bit 6 must be 0! */
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if (WARN_ON_ONCE((CMOS_READ(RTC_VALID) & 0x7f) != 0)) {
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if (WARN_ON_ONCE((CMOS_READ(RTC_VALID) & 0x40) != 0)) {
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spin_unlock_irqrestore(&rtc_lock, flags);
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spin_unlock_irqrestore(&rtc_lock, flags);
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memset(time, 0xff, sizeof(*time));
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memset(time, 0xff, sizeof(*time));
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return 0;
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return 0;
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