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iommu/vt-d: Avoid unnecessary global IRTE cache invalidation

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Some VT-d hardware implementations invalidate all interrupt remapping
hardware translation caches as part of SIRTP flow. The VT-d spec adds
a ESIRTPS (Enhanced Set Interrupt Remap Table Pointer Support, section
11.4.2 in VT-d spec) capability bit to indicate this.

The spec also states in 11.4.4 that hardware also performs global
invalidation on all interrupt remapping caches as part of Interrupt
Remapping Disable operation if ESIRTPS capability bit is set.

This checks the ESIRTPS capability bit and skip software global cache
invalidation if it's set.

Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com>
Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
Reviewed-by: Jerry Snitselaar <jsnitsel@redhat.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
Link: https://lore.kernel.org/r/20220921065741.3572495-1-baolu.lu@linux.intel.com
Signed-off-by: Joerg Roedel <jroedel@suse.de>
This commit is contained in:
Lu Baolu 2022-09-26 21:15:28 +08:00 committed by Joerg Roedel
parent b722cb32f0
commit eb5b20114b
2 changed files with 5 additions and 2 deletions
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1
drivers/iommu/intel/iommu.h
View File

@ -146,6 +146,7 @@
/*
* Decoding Capability Register
*/
#define cap_esirtps(c) (((c) >> 62) & 1)
#define cap_fl5lp_support(c) (((c) >> 60) & 1)
#define cap_pi_support(c) (((c) >> 59) & 1)
#define cap_fl1gp_support(c) (((c) >> 56) & 1)

2
drivers/iommu/intel/irq_remapping.c
View File

@ -494,6 +494,7 @@ static void iommu_set_irq_remapping(struct intel_iommu *iommu, int mode)
* Global invalidation of interrupt entry cache to make sure the
* hardware uses the new irq remapping table.
*/
if (!cap_esirtps(iommu->cap))
qi_global_iec(iommu);
}
@ -680,6 +681,7 @@ static void iommu_disable_irq_remapping(struct intel_iommu *iommu)
* global invalidation of interrupt entry cache before disabling
* interrupt-remapping.
*/
if (!cap_esirtps(iommu->cap))
qi_global_iec(iommu);
raw_spin_lock_irqsave(&iommu->register_lock, flags);