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ALSA: dice: avoid superflous write at bus reset

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When a bus reset happens, the enable register is automatically cleared,
so we do not need to clear it manually when stopping the stream.

Signed-off-by: Clemens Ladisch <clemens@ladisch.de>
This commit is contained in:
Clemens Ladisch 2011-09-04 22:17:45 +02:00
parent 1b70485f13
commit eadce07faa
1 changed files with 5 additions and 0 deletions
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5
sound/firewire/dice.c
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@ -246,6 +246,9 @@ static void dice_enable_clear(struct dice *dice)
{
__be32 value;
if (!dice->global_enabled)
return;
value = 0;
snd_fw_transaction(dice->unit, TCODE_WRITE_QUADLET_REQUEST,
global_address(dice, GLOBAL_ENABLE),
@ -1009,6 +1012,8 @@ static void dice_bus_reset(struct fw_unit *unit)
* manner.
*/
amdtp_out_stream_pcm_abort(&dice->stream);
dice->global_enabled = false;
dice_stream_stop_packets(dice);
dice_owner_update(dice);