mirror of
https://github.com/torvalds/linux.git
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Merge branch 'drm-nouveau-next' of git://anongit.freedesktop.org/git/nouveau/linux-2.6 into drm-next
restore debugfs vbios, fix multiple actions with supervisor intrs * 'drm-nouveau-next' of git://anongit.freedesktop.org/git/nouveau/linux-2.6: drm/nouveau: restore debugfs/vbios.rom support drm/nv50-/kms: remove UPDATE methods after each encoder disconnect drm/nvd0/disp: handle multiple actions from one set of supervisor intrs drm/nv50/disp: handle multiple actions from one set of supervisor intrs
This commit is contained in:
Dave Airlie
commit
e9f211ad7d
@ -242,5 +242,6 @@ ifdef CONFIG_X86
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nouveau-$(CONFIG_ACPI) += nouveau_acpi.o
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endif
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nouveau-$(CONFIG_DRM_NOUVEAU_BACKLIGHT) += nouveau_backlight.o
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nouveau-$(CONFIG_DEBUG_FS) += nouveau_debugfs.o
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obj-$(CONFIG_DRM_NOUVEAU)+= nouveau.o
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@ -972,21 +972,29 @@ exec_clkcmp(struct nv50_disp_priv *priv, int head, int id, u32 pclk,
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}
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static void
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nv50_disp_intr_unk10(struct nv50_disp_priv *priv, u32 super)
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nv50_disp_intr_unk10_0(struct nv50_disp_priv *priv, int head)
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{
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int head = ffs((super & 0x00000060) >> 5) - 1;
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if (head >= 0) {
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head = ffs((super & 0x00000180) >> 7) - 1;
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if (head >= 0)
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exec_script(priv, head, 1);
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}
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nv_wr32(priv, 0x610030, 0x80000000);
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exec_script(priv, head, 1);
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}
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static void
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nv50_disp_intr_unk20_dp(struct nv50_disp_priv *priv,
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struct dcb_output *outp, u32 pclk)
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nv50_disp_intr_unk20_0(struct nv50_disp_priv *priv, int head)
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{
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exec_script(priv, head, 2);
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}
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static void
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nv50_disp_intr_unk20_1(struct nv50_disp_priv *priv, int head)
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{
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struct nouveau_clock *clk = nouveau_clock(priv);
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u32 pclk = nv_rd32(priv, 0x610ad0 + (head * 0x540)) & 0x3fffff;
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if (pclk)
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clk->pll_set(clk, PLL_VPLL0 + head, pclk);
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}
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static void
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nv50_disp_intr_unk20_2_dp(struct nv50_disp_priv *priv,
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struct dcb_output *outp, u32 pclk)
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{
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const int link = !(outp->sorconf.link & 1);
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const int or = ffs(outp->or) - 1;
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@ -1092,77 +1100,54 @@ nv50_disp_intr_unk20_dp(struct nv50_disp_priv *priv,
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}
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static void
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nv50_disp_intr_unk20(struct nv50_disp_priv *priv, u32 super)
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nv50_disp_intr_unk20_2(struct nv50_disp_priv *priv, int head)
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{
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struct dcb_output outp;
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int head;
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u32 pclk = nv_rd32(priv, 0x610ad0 + (head * 0x540)) & 0x3fffff;
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u32 hval, hreg = 0x614200 + (head * 0x800);
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u32 oval, oreg;
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u32 conf = exec_clkcmp(priv, head, 0xff, pclk, &outp);
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if (conf != ~0) {
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if (outp.location == 0 && outp.type == DCB_OUTPUT_DP) {
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u32 soff = (ffs(outp.or) - 1) * 0x08;
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u32 ctrl = nv_rd32(priv, 0x610798 + soff);
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u32 datarate;
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/* finish detaching encoder? */
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head = ffs((super & 0x00000180) >> 7) - 1;
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if (head >= 0)
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exec_script(priv, head, 2);
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/* check whether a vpll change is required */
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head = ffs((super & 0x00000600) >> 9) - 1;
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if (head >= 0) {
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u32 pclk = nv_rd32(priv, 0x610ad0 + (head * 0x540)) & 0x3fffff;
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if (pclk) {
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struct nouveau_clock *clk = nouveau_clock(priv);
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clk->pll_set(clk, PLL_VPLL0 + head, pclk);
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}
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}
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/* (re)attach the relevant OR to the head */
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head = ffs((super & 0x00000180) >> 7) - 1;
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if (head >= 0) {
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u32 pclk = nv_rd32(priv, 0x610ad0 + (head * 0x540)) & 0x3fffff;
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u32 hval, hreg = 0x614200 + (head * 0x800);
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u32 oval, oreg;
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u32 conf = exec_clkcmp(priv, head, 0xff, pclk, &outp);
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if (conf != ~0) {
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if (outp.location == 0 && outp.type == DCB_OUTPUT_DP) {
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u32 soff = (ffs(outp.or) - 1) * 0x08;
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u32 ctrl = nv_rd32(priv, 0x610798 + soff);
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u32 datarate;
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switch ((ctrl & 0x000f0000) >> 16) {
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case 6: datarate = pclk * 30 / 8; break;
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case 5: datarate = pclk * 24 / 8; break;
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case 2:
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default:
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datarate = pclk * 18 / 8;
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break;
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}
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nouveau_dp_train(&priv->base, priv->sor.dp,
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&outp, head, datarate);
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switch ((ctrl & 0x000f0000) >> 16) {
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case 6: datarate = pclk * 30 / 8; break;
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case 5: datarate = pclk * 24 / 8; break;
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case 2:
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default:
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datarate = pclk * 18 / 8;
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break;
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}
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exec_clkcmp(priv, head, 0, pclk, &outp);
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if (!outp.location && outp.type == DCB_OUTPUT_ANALOG) {
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oreg = 0x614280 + (ffs(outp.or) - 1) * 0x800;
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oval = 0x00000000;
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hval = 0x00000000;
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} else
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if (!outp.location) {
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if (outp.type == DCB_OUTPUT_DP)
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nv50_disp_intr_unk20_dp(priv, &outp, pclk);
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oreg = 0x614300 + (ffs(outp.or) - 1) * 0x800;
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oval = (conf & 0x0100) ? 0x0101 : 0x0000;
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hval = 0x00000000;
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} else {
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oreg = 0x614380 + (ffs(outp.or) - 1) * 0x800;
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oval = 0x00000001;
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hval = 0x00000001;
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}
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nv_mask(priv, hreg, 0x0000000f, hval);
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nv_mask(priv, oreg, 0x00000707, oval);
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nouveau_dp_train(&priv->base, priv->sor.dp,
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&outp, head, datarate);
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}
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}
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nv_wr32(priv, 0x610030, 0x80000000);
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exec_clkcmp(priv, head, 0, pclk, &outp);
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if (!outp.location && outp.type == DCB_OUTPUT_ANALOG) {
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oreg = 0x614280 + (ffs(outp.or) - 1) * 0x800;
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oval = 0x00000000;
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hval = 0x00000000;
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} else
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if (!outp.location) {
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if (outp.type == DCB_OUTPUT_DP)
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nv50_disp_intr_unk20_2_dp(priv, &outp, pclk);
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oreg = 0x614300 + (ffs(outp.or) - 1) * 0x800;
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oval = (conf & 0x0100) ? 0x00000101 : 0x00000000;
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hval = 0x00000000;
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} else {
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oreg = 0x614380 + (ffs(outp.or) - 1) * 0x800;
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oval = 0x00000001;
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hval = 0x00000001;
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}
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nv_mask(priv, hreg, 0x0000000f, hval);
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nv_mask(priv, oreg, 0x00000707, oval);
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}
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}
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/* If programming a TMDS output on a SOR that can also be configured for
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@ -1174,7 +1159,7 @@ nv50_disp_intr_unk20(struct nv50_disp_priv *priv, u32 super)
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* programmed for DisplayPort.
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*/
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static void
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nv50_disp_intr_unk40_tmds(struct nv50_disp_priv *priv, struct dcb_output *outp)
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nv50_disp_intr_unk40_0_tmds(struct nv50_disp_priv *priv, struct dcb_output *outp)
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{
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struct nouveau_bios *bios = nouveau_bios(priv);
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const int link = !(outp->sorconf.link & 1);
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@ -1188,37 +1173,32 @@ nv50_disp_intr_unk40_tmds(struct nv50_disp_priv *priv, struct dcb_output *outp)
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}
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static void
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nv50_disp_intr_unk40(struct nv50_disp_priv *priv, u32 super)
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nv50_disp_intr_unk40_0(struct nv50_disp_priv *priv, int head)
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{
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int head = ffs((super & 0x00000180) >> 7) - 1;
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if (head >= 0) {
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struct dcb_output outp;
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u32 pclk = nv_rd32(priv, 0x610ad0 + (head * 0x540)) & 0x3fffff;
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if (exec_clkcmp(priv, head, 1, pclk, &outp) != ~0) {
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if (outp.location == 0 && outp.type == DCB_OUTPUT_TMDS)
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nv50_disp_intr_unk40_tmds(priv, &outp);
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else
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if (outp.location == 1 && outp.type == DCB_OUTPUT_DP) {
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u32 soff = (ffs(outp.or) - 1) * 0x08;
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u32 ctrl = nv_rd32(priv, 0x610b84 + soff);
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u32 datarate;
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struct dcb_output outp;
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u32 pclk = nv_rd32(priv, 0x610ad0 + (head * 0x540)) & 0x3fffff;
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if (exec_clkcmp(priv, head, 1, pclk, &outp) != ~0) {
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if (outp.location == 0 && outp.type == DCB_OUTPUT_TMDS)
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nv50_disp_intr_unk40_0_tmds(priv, &outp);
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else
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if (outp.location == 1 && outp.type == DCB_OUTPUT_DP) {
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u32 soff = (ffs(outp.or) - 1) * 0x08;
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u32 ctrl = nv_rd32(priv, 0x610b84 + soff);
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u32 datarate;
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switch ((ctrl & 0x000f0000) >> 16) {
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case 6: datarate = pclk * 30 / 8; break;
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case 5: datarate = pclk * 24 / 8; break;
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case 2:
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default:
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datarate = pclk * 18 / 8;
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break;
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}
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nouveau_dp_train(&priv->base, priv->pior.dp,
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&outp, head, datarate);
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switch ((ctrl & 0x000f0000) >> 16) {
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case 6: datarate = pclk * 30 / 8; break;
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case 5: datarate = pclk * 24 / 8; break;
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case 2:
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default:
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datarate = pclk * 18 / 8;
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break;
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}
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nouveau_dp_train(&priv->base, priv->pior.dp,
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&outp, head, datarate);
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}
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}
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nv_wr32(priv, 0x610030, 0x80000000);
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}
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void
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@ -1227,15 +1207,45 @@ nv50_disp_intr_supervisor(struct work_struct *work)
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struct nv50_disp_priv *priv =
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container_of(work, struct nv50_disp_priv, supervisor);
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u32 super = nv_rd32(priv, 0x610030);
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int head;
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nv_debug(priv, "supervisor 0x%08x 0x%08x\n", priv->super, super);
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if (priv->super & 0x00000010)
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nv50_disp_intr_unk10(priv, super);
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if (priv->super & 0x00000020)
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nv50_disp_intr_unk20(priv, super);
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if (priv->super & 0x00000040)
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nv50_disp_intr_unk40(priv, super);
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if (priv->super & 0x00000010) {
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for (head = 0; head < priv->head.nr; head++) {
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if (!(super & (0x00000020 << head)))
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continue;
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if (!(super & (0x00000080 << head)))
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continue;
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nv50_disp_intr_unk10_0(priv, head);
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}
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} else
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if (priv->super & 0x00000020) {
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for (head = 0; head < priv->head.nr; head++) {
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if (!(super & (0x00000080 << head)))
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continue;
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nv50_disp_intr_unk20_0(priv, head);
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}
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for (head = 0; head < priv->head.nr; head++) {
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if (!(super & (0x00000200 << head)))
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continue;
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nv50_disp_intr_unk20_1(priv, head);
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}
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for (head = 0; head < priv->head.nr; head++) {
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if (!(super & (0x00000080 << head)))
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continue;
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nv50_disp_intr_unk20_2(priv, head);
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}
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} else
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if (priv->super & 0x00000040) {
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for (head = 0; head < priv->head.nr; head++) {
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if (!(super & (0x00000080 << head)))
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continue;
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nv50_disp_intr_unk40_0(priv, head);
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}
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}
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nv_wr32(priv, 0x610030, 0x80000000);
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}
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void
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@ -623,13 +623,24 @@ exec_lookup(struct nv50_disp_priv *priv, int head, int outp, u32 ctrl,
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}
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static bool
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exec_script(struct nv50_disp_priv *priv, int head, int outp, u32 ctrl, int id)
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exec_script(struct nv50_disp_priv *priv, int head, int id)
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{
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struct nouveau_bios *bios = nouveau_bios(priv);
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struct nvbios_outp info;
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struct dcb_output dcb;
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u8 ver, hdr, cnt, len;
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u32 ctrl = 0x00000000;
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u16 data;
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int outp;
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for (outp = 0; !(ctrl & (1 << head)) && outp < 8; outp++) {
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ctrl = nv_rd32(priv, 0x640180 + (outp * 0x20));
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if (ctrl & (1 << head))
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break;
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}
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if (outp == 8)
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return false;
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data = exec_lookup(priv, head, outp, ctrl, &dcb, &ver, &hdr, &cnt, &len, &info);
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if (data) {
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@ -649,14 +660,25 @@ exec_script(struct nv50_disp_priv *priv, int head, int outp, u32 ctrl, int id)
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}
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static u32
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exec_clkcmp(struct nv50_disp_priv *priv, int head, int outp,
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u32 ctrl, int id, u32 pclk, struct dcb_output *dcb)
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exec_clkcmp(struct nv50_disp_priv *priv, int head, int id,
|
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u32 pclk, struct dcb_output *dcb)
|
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{
|
||||
struct nouveau_bios *bios = nouveau_bios(priv);
|
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struct nvbios_outp info1;
|
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struct nvbios_ocfg info2;
|
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u8 ver, hdr, cnt, len;
|
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u32 ctrl = 0x00000000;
|
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u32 data, conf = ~0;
|
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int outp;
|
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|
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for (outp = 0; !(ctrl & (1 << head)) && outp < 8; outp++) {
|
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ctrl = nv_rd32(priv, 0x660180 + (outp * 0x20));
|
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if (ctrl & (1 << head))
|
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break;
|
||||
}
|
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|
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if (outp == 8)
|
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return false;
|
||||
|
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data = exec_lookup(priv, head, outp, ctrl, dcb, &ver, &hdr, &cnt, &len, &info1);
|
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if (data == 0x0000)
|
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@ -701,24 +723,32 @@ exec_clkcmp(struct nv50_disp_priv *priv, int head, int outp,
|
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}
|
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|
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static void
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nvd0_display_unk1_handler(struct nv50_disp_priv *priv, u32 head, u32 mask)
|
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nvd0_disp_intr_unk1_0(struct nv50_disp_priv *priv, int head)
|
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{
|
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int i;
|
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|
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for (i = 0; mask && i < 8; i++) {
|
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u32 mcc = nv_rd32(priv, 0x640180 + (i * 0x20));
|
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if (mcc & (1 << head))
|
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exec_script(priv, head, i, mcc, 1);
|
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}
|
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|
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nv_wr32(priv, 0x6101d4, 0x00000000);
|
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nv_wr32(priv, 0x6109d4, 0x00000000);
|
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nv_wr32(priv, 0x6101d0, 0x80000000);
|
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exec_script(priv, head, 1);
|
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}
|
||||
|
||||
static void
|
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nvd0_display_unk2_calc_tu(struct nv50_disp_priv *priv, int head, int or)
|
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nvd0_disp_intr_unk2_0(struct nv50_disp_priv *priv, int head)
|
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{
|
||||
exec_script(priv, head, 2);
|
||||
}
|
||||
|
||||
static void
|
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nvd0_disp_intr_unk2_1(struct nv50_disp_priv *priv, int head)
|
||||
{
|
||||
struct nouveau_clock *clk = nouveau_clock(priv);
|
||||
u32 pclk = nv_rd32(priv, 0x660450 + (head * 0x300)) / 1000;
|
||||
if (pclk)
|
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clk->pll_set(clk, PLL_VPLL0 + head, pclk);
|
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nv_wr32(priv, 0x612200 + (head * 0x800), 0x00000000);
|
||||
}
|
||||
|
||||
static void
|
||||
nvd0_disp_intr_unk2_2_tu(struct nv50_disp_priv *priv, int head,
|
||||
struct dcb_output *outp)
|
||||
{
|
||||
const int or = ffs(outp->or) - 1;
|
||||
const u32 ctrl = nv_rd32(priv, 0x660200 + (or * 0x020));
|
||||
const u32 conf = nv_rd32(priv, 0x660404 + (head * 0x300));
|
||||
const u32 pclk = nv_rd32(priv, 0x660450 + (head * 0x300)) / 1000;
|
||||
@ -761,97 +791,51 @@ nvd0_display_unk2_calc_tu(struct nv50_disp_priv *priv, int head, int or)
|
||||
}
|
||||
|
||||
static void
|
||||
nvd0_display_unk2_handler(struct nv50_disp_priv *priv, u32 head, u32 mask)
|
||||
nvd0_disp_intr_unk2_2(struct nv50_disp_priv *priv, int head)
|
||||
{
|
||||
struct dcb_output outp;
|
||||
u32 pclk;
|
||||
int i;
|
||||
u32 pclk = nv_rd32(priv, 0x660450 + (head * 0x300)) / 1000;
|
||||
u32 conf = exec_clkcmp(priv, head, 0xff, pclk, &outp);
|
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if (conf != ~0) {
|
||||
u32 addr, data;
|
||||
|
||||
for (i = 0; mask && i < 8; i++) {
|
||||
u32 mcc = nv_rd32(priv, 0x640180 + (i * 0x20));
|
||||
if (mcc & (1 << head))
|
||||
exec_script(priv, head, i, mcc, 2);
|
||||
}
|
||||
|
||||
pclk = nv_rd32(priv, 0x660450 + (head * 0x300)) / 1000;
|
||||
nv_debug(priv, "head %d pclk %d mask 0x%08x\n", head, pclk, mask);
|
||||
if (pclk && (mask & 0x00010000)) {
|
||||
struct nouveau_clock *clk = nouveau_clock(priv);
|
||||
clk->pll_set(clk, PLL_VPLL0 + head, pclk);
|
||||
}
|
||||
|
||||
nv_wr32(priv, 0x612200 + (head * 0x800), 0x00000000);
|
||||
|
||||
for (i = 0; mask && i < 8; i++) {
|
||||
u32 mcp = nv_rd32(priv, 0x660180 + (i * 0x20));
|
||||
if (mcp & (1 << head)) {
|
||||
u32 cfg = exec_clkcmp(priv, head, i, mcp, 0xff, pclk, &outp);
|
||||
if (cfg != ~0) {
|
||||
u32 addr, mask, data = 0x00000000;
|
||||
|
||||
if (outp.type == DCB_OUTPUT_DP) {
|
||||
switch ((mcp & 0x000f0000) >> 16) {
|
||||
case 6: pclk = pclk * 30 / 8; break;
|
||||
case 5: pclk = pclk * 24 / 8; break;
|
||||
case 2:
|
||||
default:
|
||||
pclk = pclk * 18 / 8;
|
||||
break;
|
||||
}
|
||||
|
||||
nouveau_dp_train(&priv->base,
|
||||
priv->sor.dp,
|
||||
&outp, head, pclk);
|
||||
}
|
||||
|
||||
exec_clkcmp(priv, head, i, mcp, 0, pclk, &outp);
|
||||
|
||||
if (i < 4) {
|
||||
addr = 0x612280 + ((i - 0) * 0x800);
|
||||
mask = 0xffffffff;
|
||||
} else {
|
||||
switch (mcp & 0x00000f00) {
|
||||
case 0x00000800:
|
||||
case 0x00000900:
|
||||
nvd0_display_unk2_calc_tu(priv, head, i - 4);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
addr = 0x612300 + ((i - 4) * 0x800);
|
||||
mask = 0x00000707;
|
||||
if (cfg & 0x00000100)
|
||||
data = 0x00000101;
|
||||
}
|
||||
nv_mask(priv, addr, mask, data);
|
||||
if (outp.type == DCB_OUTPUT_DP) {
|
||||
u32 sync = nv_rd32(priv, 0x660404 + (head * 0x300));
|
||||
switch ((sync & 0x000003c0) >> 6) {
|
||||
case 6: pclk = pclk * 30 / 8; break;
|
||||
case 5: pclk = pclk * 24 / 8; break;
|
||||
case 2:
|
||||
default:
|
||||
pclk = pclk * 18 / 8;
|
||||
break;
|
||||
}
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
nv_wr32(priv, 0x6101d4, 0x00000000);
|
||||
nv_wr32(priv, 0x6109d4, 0x00000000);
|
||||
nv_wr32(priv, 0x6101d0, 0x80000000);
|
||||
nouveau_dp_train(&priv->base, priv->sor.dp,
|
||||
&outp, head, pclk);
|
||||
}
|
||||
|
||||
exec_clkcmp(priv, head, 0, pclk, &outp);
|
||||
|
||||
if (outp.type == DCB_OUTPUT_ANALOG) {
|
||||
addr = 0x612280 + (ffs(outp.or) - 1) * 0x800;
|
||||
data = 0x00000000;
|
||||
} else {
|
||||
if (outp.type == DCB_OUTPUT_DP)
|
||||
nvd0_disp_intr_unk2_2_tu(priv, head, &outp);
|
||||
addr = 0x612300 + (ffs(outp.or) - 1) * 0x800;
|
||||
data = (conf & 0x0100) ? 0x00000101 : 0x00000000;
|
||||
}
|
||||
|
||||
nv_mask(priv, addr, 0x00000707, data);
|
||||
}
|
||||
}
|
||||
|
||||
static void
|
||||
nvd0_display_unk4_handler(struct nv50_disp_priv *priv, u32 head, u32 mask)
|
||||
nvd0_disp_intr_unk4_0(struct nv50_disp_priv *priv, int head)
|
||||
{
|
||||
struct dcb_output outp;
|
||||
int pclk, i;
|
||||
|
||||
pclk = nv_rd32(priv, 0x660450 + (head * 0x300)) / 1000;
|
||||
|
||||
for (i = 0; mask && i < 8; i++) {
|
||||
u32 mcp = nv_rd32(priv, 0x660180 + (i * 0x20));
|
||||
if (mcp & (1 << head))
|
||||
exec_clkcmp(priv, head, i, mcp, 1, pclk, &outp);
|
||||
}
|
||||
|
||||
nv_wr32(priv, 0x6101d4, 0x00000000);
|
||||
nv_wr32(priv, 0x6109d4, 0x00000000);
|
||||
nv_wr32(priv, 0x6101d0, 0x80000000);
|
||||
u32 pclk = nv_rd32(priv, 0x660450 + (head * 0x300)) / 1000;
|
||||
exec_clkcmp(priv, head, 1, pclk, &outp);
|
||||
}
|
||||
|
||||
void
|
||||
@ -859,19 +843,50 @@ nvd0_disp_intr_supervisor(struct work_struct *work)
|
||||
{
|
||||
struct nv50_disp_priv *priv =
|
||||
container_of(work, struct nv50_disp_priv, supervisor);
|
||||
u32 mask = 0, head = ~0;
|
||||
u32 mask[4];
|
||||
int head;
|
||||
|
||||
while (!mask && ++head < priv->head.nr)
|
||||
mask = nv_rd32(priv, 0x6101d4 + (head * 0x800));
|
||||
nv_debug(priv, "supervisor %08x\n", priv->super);
|
||||
for (head = 0; head < priv->head.nr; head++) {
|
||||
mask[head] = nv_rd32(priv, 0x6101d4 + (head * 0x800));
|
||||
nv_debug(priv, "head %d: 0x%08x\n", head, mask[head]);
|
||||
}
|
||||
|
||||
nv_debug(priv, "supervisor %08x %08x %d\n", priv->super, mask, head);
|
||||
if (priv->super & 0x00000001) {
|
||||
for (head = 0; head < priv->head.nr; head++) {
|
||||
if (!(mask[head] & 0x00001000))
|
||||
continue;
|
||||
nvd0_disp_intr_unk1_0(priv, head);
|
||||
}
|
||||
} else
|
||||
if (priv->super & 0x00000002) {
|
||||
for (head = 0; head < priv->head.nr; head++) {
|
||||
if (!(mask[head] & 0x00001000))
|
||||
continue;
|
||||
nvd0_disp_intr_unk2_0(priv, head);
|
||||
}
|
||||
for (head = 0; head < priv->head.nr; head++) {
|
||||
if (!(mask[head] & 0x00010000))
|
||||
continue;
|
||||
nvd0_disp_intr_unk2_1(priv, head);
|
||||
}
|
||||
for (head = 0; head < priv->head.nr; head++) {
|
||||
if (!(mask[head] & 0x00001000))
|
||||
continue;
|
||||
nvd0_disp_intr_unk2_2(priv, head);
|
||||
}
|
||||
} else
|
||||
if (priv->super & 0x00000004) {
|
||||
for (head = 0; head < priv->head.nr; head++) {
|
||||
if (!(mask[head] & 0x00001000))
|
||||
continue;
|
||||
nvd0_disp_intr_unk4_0(priv, head);
|
||||
}
|
||||
}
|
||||
|
||||
if (priv->super & 0x00000001)
|
||||
nvd0_display_unk1_handler(priv, head, mask);
|
||||
if (priv->super & 0x00000002)
|
||||
nvd0_display_unk2_handler(priv, head, mask);
|
||||
if (priv->super & 0x00000004)
|
||||
nvd0_display_unk4_handler(priv, head, mask);
|
||||
for (head = 0; head < priv->head.nr; head++)
|
||||
nv_wr32(priv, 0x6101d4 + (head * 0x800), 0x00000000);
|
||||
nv_wr32(priv, 0x6101d0, 0x80000000);
|
||||
}
|
||||
|
||||
void
|
||||
|
||||
64
drivers/gpu/drm/nouveau/nouveau_debugfs.c
Normal file
64
drivers/gpu/drm/nouveau/nouveau_debugfs.c
Normal file
@ -0,0 +1,64 @@
|
||||
/*
|
||||
* Copyright (C) 2009 Red Hat <bskeggs@redhat.com>
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining
|
||||
* a copy of this software and associated documentation files (the
|
||||
* "Software"), to deal in the Software without restriction, including
|
||||
* without limitation the rights to use, copy, modify, merge, publish,
|
||||
* distribute, sublicense, and/or sell copies of the Software, and to
|
||||
* permit persons to whom the Software is furnished to do so, subject to
|
||||
* the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice (including the
|
||||
* next paragraph) shall be included in all copies or substantial
|
||||
* portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
|
||||
* IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
|
||||
* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
|
||||
* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
|
||||
* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
*/
|
||||
|
||||
/*
|
||||
* Authors:
|
||||
* Ben Skeggs <bskeggs@redhat.com>
|
||||
*/
|
||||
|
||||
#include "nouveau_debugfs.h"
|
||||
#include "nouveau_drm.h"
|
||||
|
||||
static int
|
||||
nouveau_debugfs_vbios_image(struct seq_file *m, void *data)
|
||||
{
|
||||
struct drm_info_node *node = (struct drm_info_node *) m->private;
|
||||
struct nouveau_drm *drm = nouveau_drm(node->minor->dev);
|
||||
int i;
|
||||
|
||||
for (i = 0; i < drm->vbios.length; i++)
|
||||
seq_printf(m, "%c", drm->vbios.data[i]);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct drm_info_list nouveau_debugfs_list[] = {
|
||||
{ "vbios.rom", nouveau_debugfs_vbios_image, 0, NULL },
|
||||
};
|
||||
#define NOUVEAU_DEBUGFS_ENTRIES ARRAY_SIZE(nouveau_debugfs_list)
|
||||
|
||||
int
|
||||
nouveau_debugfs_init(struct drm_minor *minor)
|
||||
{
|
||||
drm_debugfs_create_files(nouveau_debugfs_list, NOUVEAU_DEBUGFS_ENTRIES,
|
||||
minor->debugfs_root, minor);
|
||||
return 0;
|
||||
}
|
||||
|
||||
void
|
||||
nouveau_debugfs_takedown(struct drm_minor *minor)
|
||||
{
|
||||
drm_debugfs_remove_files(nouveau_debugfs_list, NOUVEAU_DEBUGFS_ENTRIES,
|
||||
minor);
|
||||
}
|
||||
22
drivers/gpu/drm/nouveau/nouveau_debugfs.h
Normal file
22
drivers/gpu/drm/nouveau/nouveau_debugfs.h
Normal file
@ -0,0 +1,22 @@
|
||||
#ifndef __NOUVEAU_DEBUGFS_H__
|
||||
#define __NOUVEAU_DEBUGFS_H__
|
||||
|
||||
#include <drm/drmP.h>
|
||||
|
||||
#if defined(CONFIG_DEBUG_FS)
|
||||
extern int nouveau_debugfs_init(struct drm_minor *);
|
||||
extern void nouveau_debugfs_takedown(struct drm_minor *);
|
||||
#else
|
||||
static inline int
|
||||
nouveau_debugfs_init(struct drm_minor *minor)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline void nouveau_debugfs_takedown(struct drm_minor *minor)
|
||||
{
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
||||
@ -50,6 +50,7 @@
|
||||
#include "nouveau_abi16.h"
|
||||
#include "nouveau_fbcon.h"
|
||||
#include "nouveau_fence.h"
|
||||
#include "nouveau_debugfs.h"
|
||||
|
||||
MODULE_PARM_DESC(config, "option string to pass to driver core");
|
||||
static char *nouveau_config;
|
||||
@ -667,6 +668,11 @@ driver = {
|
||||
.postclose = nouveau_drm_postclose,
|
||||
.lastclose = nouveau_vga_lastclose,
|
||||
|
||||
#if defined(CONFIG_DEBUG_FS)
|
||||
.debugfs_init = nouveau_debugfs_init,
|
||||
.debugfs_cleanup = nouveau_debugfs_takedown,
|
||||
#endif
|
||||
|
||||
.irq_preinstall = nouveau_irq_preinstall,
|
||||
.irq_postinstall = nouveau_irq_postinstall,
|
||||
.irq_uninstall = nouveau_irq_uninstall,
|
||||
|
||||
@ -1519,9 +1519,6 @@ nv50_dac_disconnect(struct drm_encoder *encoder)
|
||||
evo_mthd(push, 0x0180 + (or * 0x020), 1);
|
||||
evo_data(push, 0x00000000);
|
||||
}
|
||||
|
||||
evo_mthd(push, 0x0080, 1);
|
||||
evo_data(push, 0x00000000);
|
||||
evo_kick(push, mast);
|
||||
}
|
||||
}
|
||||
@ -1735,9 +1732,6 @@ nv50_sor_disconnect(struct drm_encoder *encoder)
|
||||
evo_mthd(push, 0x0200 + (or * 0x20), 1);
|
||||
evo_data(push, 0x00000000);
|
||||
}
|
||||
|
||||
evo_mthd(push, 0x0080, 1);
|
||||
evo_data(push, 0x00000000);
|
||||
evo_kick(push, mast);
|
||||
}
|
||||
|
||||
@ -2039,9 +2033,6 @@ nv50_pior_disconnect(struct drm_encoder *encoder)
|
||||
evo_mthd(push, 0x0700 + (or * 0x040), 1);
|
||||
evo_data(push, 0x00000000);
|
||||
}
|
||||
|
||||
evo_mthd(push, 0x0080, 1);
|
||||
evo_data(push, 0x00000000);
|
||||
evo_kick(push, mast);
|
||||
}
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user