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staging: mt7621-pci: remove dead code derived to not use custom reads and writes

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Driver is using now pci subsystem generics reads and writes and requesting
bus resources without using legacy code functions. Because of this there is
a lot of dead code that can be removed.

Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Tested-by: NeilBrown <neil@brown.name>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Sergio Paracuellos 2018-08-03 10:26:55 +02:00 committed by Greg Kroah-Hartman
parent 8571c62d45
commit e9d03d17dd
1 changed files with 0 additions and 128 deletions
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128
drivers/staging/mt7621-pci/pci-mt7621.c
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@ -123,15 +123,6 @@
*(volatile u32 *)(RALINK_PCI_BASE+(ofs)) = cpu_to_le32(data)
#define MV_READ(ofs, data) \
*(data) = le32_to_cpu(*(volatile u32 *)(RALINK_PCI_BASE+(ofs)))
#define MV_WRITE_16(ofs, data) \
*(volatile u16 *)(RALINK_PCI_BASE+(ofs)) = cpu_to_le16(data)
#define MV_READ_16(ofs, data) \
*(data) = le16_to_cpu(*(volatile u16 *)(RALINK_PCI_BASE+(ofs)))
#define MV_WRITE_8(ofs, data) \
*(volatile u8 *)(RALINK_PCI_BASE+(ofs)) = data
#define MV_READ_8(ofs, data) \
*(data) = *(volatile u8 *)(RALINK_PCI_BASE+(ofs))
#define RALINK_PCI_MM_MAP_BASE 0x60000000
#define RALINK_PCI_IO_MAP_BASE 0x1e160000
@ -176,13 +167,6 @@
#define MEMORY_BASE 0x0
static int pcie_link_status = 0;
#define PCI_ACCESS_READ_1 0
#define PCI_ACCESS_READ_2 1
#define PCI_ACCESS_READ_4 2
#define PCI_ACCESS_WRITE_1 3
#define PCI_ACCESS_WRITE_2 4
#define PCI_ACCESS_WRITE_4 5
/**
* struct mt7621_pcie_port - PCIe port information
* @base: IO mapped register base
@ -227,118 +211,6 @@ static inline u32 mt7621_pci_get_cfgaddr(unsigned int bus, unsigned int slot,
(func << 8) | (where & 0xfc) | 0x80000000;
}
static int config_access(unsigned char access_type, struct pci_bus *bus,
unsigned int devfn, unsigned int where, u32 *data)
{
unsigned int slot = PCI_SLOT(devfn);
u8 func = PCI_FUNC(devfn);
u32 address_reg, data_reg;
unsigned int address;
address_reg = RALINK_PCI_CONFIG_ADDR;
data_reg = RALINK_PCI_CONFIG_DATA_VIRTUAL_REG;
address = mt7621_pci_get_cfgaddr(bus->number, slot, func, where);
MV_WRITE(address_reg, address);
switch (access_type) {
case PCI_ACCESS_WRITE_1:
MV_WRITE_8(data_reg+(where&0x3), *data);
break;
case PCI_ACCESS_WRITE_2:
MV_WRITE_16(data_reg+(where&0x3), *data);
break;
case PCI_ACCESS_WRITE_4:
MV_WRITE(data_reg, *data);
break;
case PCI_ACCESS_READ_1:
MV_READ_8(data_reg+(where&0x3), data);
break;
case PCI_ACCESS_READ_2:
MV_READ_16(data_reg+(where&0x3), data);
break;
case PCI_ACCESS_READ_4:
MV_READ(data_reg, data);
break;
default:
printk("no specify access type\n");
break;
}
return 0;
}
static int
read_config_byte(struct pci_bus *bus, unsigned int devfn, int where, u8 *val)
{
return config_access(PCI_ACCESS_READ_1, bus, devfn, (unsigned int)where, (u32 *)val);
}
static int
read_config_word(struct pci_bus *bus, unsigned int devfn, int where, u16 *val)
{
return config_access(PCI_ACCESS_READ_2, bus, devfn, (unsigned int)where, (u32 *)val);
}
static int
read_config_dword(struct pci_bus *bus, unsigned int devfn, int where, u32 *val)
{
return config_access(PCI_ACCESS_READ_4, bus, devfn, (unsigned int)where, (u32 *)val);
}
static int
write_config_byte(struct pci_bus *bus, unsigned int devfn, int where, u8 val)
{
if (config_access(PCI_ACCESS_WRITE_1, bus, devfn, (unsigned int)where, (u32 *)&val))
return -1;
return PCIBIOS_SUCCESSFUL;
}
static int
write_config_word(struct pci_bus *bus, unsigned int devfn, int where, u16 val)
{
if (config_access(PCI_ACCESS_WRITE_2, bus, devfn, where, (u32 *)&val))
return -1;
return PCIBIOS_SUCCESSFUL;
}
static int
write_config_dword(struct pci_bus *bus, unsigned int devfn, int where, u32 val)
{
if (config_access(PCI_ACCESS_WRITE_4, bus, devfn, where, &val))
return -1;
return PCIBIOS_SUCCESSFUL;
}
static int
pci_config_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val)
{
switch (size) {
case 1:
return read_config_byte(bus, devfn, where, (u8 *) val);
case 2:
return read_config_word(bus, devfn, where, (u16 *) val);
default:
return read_config_dword(bus, devfn, where, val);
}
}
static int
pci_config_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val)
{
switch (size) {
case 1:
return write_config_byte(bus, devfn, where, (u8) val);
case 2:
return write_config_word(bus, devfn, where, (u16) val);
default:
return write_config_dword(bus, devfn, where, val);
}
}
static void __iomem *mt7621_pcie_map_bus(struct pci_bus *bus,
unsigned int devfn, int where)
{