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ARM: 8135/1: Fix in-correct barrier usage in SWP{B} emulation
According to the ARM ARMv7, explicit barriers are necessary when using synchronisation primitives such as SWP{B}. The use of these instructions does not automatically imply a barrier and any ordering requirements by the software must be explicitly expressed with the use of suitable barriers. Based on this, remove the barriers from SWP{B} emulation. Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Punit Agrawal <punit.agrawal@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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@ -142,14 +142,6 @@ static int emulate_swpX(unsigned int address, unsigned int *data,
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while (1) {
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unsigned long temp;
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/*
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* Barrier required between accessing protected resource and
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* releasing a lock for it. Legacy code might not have done
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* this, and we cannot determine that this is not the case
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* being emulated, so insert always.
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*/
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smp_mb();
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if (type == TYPE_SWPB)
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__user_swpb_asm(*data, address, res, temp);
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else
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@ -162,13 +154,6 @@ static int emulate_swpX(unsigned int address, unsigned int *data,
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}
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if (res == 0) {
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/*
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* Barrier also required between acquiring a lock for a
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* protected resource and accessing the resource. Inserted for
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* same reason as above.
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*/
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smp_mb();
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if (type == TYPE_SWPB)
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swpbcounter++;
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else
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