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spi: cadence-quadspi: Add flag for direct mode writes
Create new flag inorder to avoid playing with use_direct_mode flag currently being used throughout the driver. Disable DAC write if auto polling is disabled or CQSPI_DISABLE_DAC_MODE is set. Signed-off-by: Dhruva Gole <d-gole@ti.com> Link: https://lore.kernel.org/r/20230125081023.1573712-3-d-gole@ti.com Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -84,6 +84,7 @@ struct cqspi_st {
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u32 trigger_address;
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u32 wr_delay;
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bool use_direct_mode;
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bool use_direct_mode_wr;
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struct cqspi_flash_pdata f_pdata[CQSPI_MAX_CHIPSELECT];
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bool use_dma_read;
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u32 pd_dev_id;
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@ -945,6 +946,12 @@ static int cqspi_write_setup(struct cqspi_flash_pdata *f_pdata,
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reg = readl(reg_base + CQSPI_REG_WR_COMPLETION_CTRL);
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reg |= CQSPI_REG_WR_DISABLE_AUTO_POLL;
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writel(reg, reg_base + CQSPI_REG_WR_COMPLETION_CTRL);
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/*
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* DAC mode require auto polling as flash needs to be polled
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* for write completion in case of bubble in SPI transaction
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* due to slow CPU/DMA master.
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*/
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cqspi->use_direct_mode_wr = false;
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}
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reg = readl(reg_base + CQSPI_REG_SIZE);
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@ -1230,7 +1237,7 @@ static ssize_t cqspi_write(struct cqspi_flash_pdata *f_pdata,
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* data.
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*/
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if (!op->cmd.dtr && cqspi->use_direct_mode &&
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((to + len) <= cqspi->ahb_size)) {
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cqspi->use_direct_mode_wr && ((to + len) <= cqspi->ahb_size)) {
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memcpy_toio(cqspi->ahb_base + to, buf, len);
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return cqspi_wait_idle(cqspi);
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}
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@ -1700,8 +1707,10 @@ static int cqspi_probe(struct platform_device *pdev)
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cqspi->master_ref_clk_hz);
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if (ddata->hwcaps_mask & CQSPI_SUPPORTS_OCTAL)
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master->mode_bits |= SPI_RX_OCTAL | SPI_TX_OCTAL;
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if (!(ddata->quirks & CQSPI_DISABLE_DAC_MODE))
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if (!(ddata->quirks & CQSPI_DISABLE_DAC_MODE)) {
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cqspi->use_direct_mode = true;
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cqspi->use_direct_mode_wr = true;
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}
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if (ddata->quirks & CQSPI_SUPPORT_EXTERNAL_DMA)
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cqspi->use_dma_read = true;
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if (ddata->quirks & CQSPI_NO_SUPPORT_WR_COMPLETION)
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