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riscv: Fix ALT_THEAD_PMA's asm parameters
After commita35707c3d8
("riscv: add memory-type errata for T-Head"), builds with LLVM's integrated assembler fail like: In file included from arch/riscv/kernel/asm-offsets.c:10: In file included from ./include/linux/mm.h:29: In file included from ./include/linux/pgtable.h:6: In file included from ./arch/riscv/include/asm/pgtable.h:114: ./arch/riscv/include/asm/pgtable-64.h:210:2: error: invalid input constraint '0' in asm ALT_THEAD_PMA(prot_val); ^ ./arch/riscv/include/asm/errata_list.h:88:4: note: expanded from macro 'ALT_THEAD_PMA' : "0"(_val), \ ^ This was reported upstream to LLVM where Jessica pointed out a couple of issues with the existing implementation of ALT_THEAD_PMA: * t3 is modified but not listed in the clobbers list. * "+r"(_val) marks _val as both an input and output of the asm but then "0"(_val) marks _val as an input matching constraint, which does not make much sense in this situation, as %1 is not actually used in the asm and matching constraints are designed to be used for different inputs that need to use the same register. Drop the matching contraint and shift all the operands by one, as %1 is unused, and mark t3 as clobbered. This resolves the build error and goes not cause any problems with GNU as. Fixes:a35707c3d8
("riscv: add memory-type errata for T-Head") Link: https://github.com/ClangBuiltLinux/linux/issues/1641 Link: https://github.com/llvm/llvm-project/issues/55514 Link: https://gcc.gnu.org/onlinedocs/gcc/Simple-Constraints.html Suggested-by: Jessica Clarke <jrtc27@jrtc27.com> Signed-off-by: Nathan Chancellor <nathan@kernel.org> Reviewed-by: Nick Desaulniers <ndesaulniers@google.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20220518184529.454008-1-nathan@kernel.org Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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@ -75,20 +75,20 @@ asm volatile(ALTERNATIVE( \
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"nop\n\t" \
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"nop\n\t" \
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"nop", \
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"li t3, %2\n\t" \
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"slli t3, t3, %4\n\t" \
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"li t3, %1\n\t" \
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"slli t3, t3, %3\n\t" \
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"and t3, %0, t3\n\t" \
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"bne t3, zero, 2f\n\t" \
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"li t3, %3\n\t" \
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"slli t3, t3, %4\n\t" \
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"li t3, %2\n\t" \
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"slli t3, t3, %3\n\t" \
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"or %0, %0, t3\n\t" \
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"2:", THEAD_VENDOR_ID, \
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ERRATA_THEAD_PBMT, CONFIG_ERRATA_THEAD_PBMT) \
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: "+r"(_val) \
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: "0"(_val), \
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"I"(_PAGE_MTMASK_THEAD >> ALT_THEAD_PBMT_SHIFT), \
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: "I"(_PAGE_MTMASK_THEAD >> ALT_THEAD_PBMT_SHIFT), \
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"I"(_PAGE_PMA_THEAD >> ALT_THEAD_PBMT_SHIFT), \
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"I"(ALT_THEAD_PBMT_SHIFT))
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"I"(ALT_THEAD_PBMT_SHIFT) \
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: "t3")
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#else
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#define ALT_THEAD_PMA(_val)
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#endif
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