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[media] adv7842: Re-worked query_dv_timings()

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This simplified the code quite a bit.

Signed-off-by: Martin Bugge <marbugge@cisco.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
This commit is contained in:
Martin Bugge 2013-12-10 10:57:03 -03:00 committed by Mauro Carvalho Chehab
parent 591b72fe73
commit e78d834a2e
1 changed files with 35 additions and 77 deletions
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112
drivers/media/i2c/adv7842.c
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@ -1314,6 +1314,8 @@ static int adv7842_query_dv_timings(struct v4l2_subdev *sd,
struct v4l2_bt_timings *bt = &timings->bt; struct v4l2_bt_timings *bt = &timings->bt;
struct stdi_readback stdi = { 0 }; struct stdi_readback stdi = { 0 };
v4l2_dbg(1, debug, sd, "%s:\n", __func__);
/* SDP block */ /* SDP block */
if (state->mode == ADV7842_MODE_SDP) if (state->mode == ADV7842_MODE_SDP)
return -ENODATA; return -ENODATA;
@ -1325,92 +1327,46 @@ static int adv7842_query_dv_timings(struct v4l2_subdev *sd,
} }
bt->interlaced = stdi.interlaced ? bt->interlaced = stdi.interlaced ?
V4L2_DV_INTERLACED : V4L2_DV_PROGRESSIVE; V4L2_DV_INTERLACED : V4L2_DV_PROGRESSIVE;
bt->polarities = ((hdmi_read(sd, 0x05) & 0x10) ? V4L2_DV_VSYNC_POS_POL : 0) |
((hdmi_read(sd, 0x05) & 0x20) ? V4L2_DV_HSYNC_POS_POL : 0);
bt->vsync = stdi.lcvs;
if (is_digital_input(sd)) { if (is_digital_input(sd)) {
bool lock = hdmi_read(sd, 0x04) & 0x02; uint32_t freq;
bool interlaced = hdmi_read(sd, 0x0b) & 0x20;
unsigned w = (hdmi_read(sd, 0x07) & 0x1f) * 256 + hdmi_read(sd, 0x08); timings->type = V4L2_DV_BT_656_1120;
unsigned h = (hdmi_read(sd, 0x09) & 0x1f) * 256 + hdmi_read(sd, 0x0a); bt->width = (hdmi_read(sd, 0x07) & 0x0f) * 256 + hdmi_read(sd, 0x08);
unsigned w_total = (hdmi_read(sd, 0x1e) & 0x3f) * 256 + bt->height = (hdmi_read(sd, 0x09) & 0x0f) * 256 + hdmi_read(sd, 0x0a);
hdmi_read(sd, 0x1f); freq = (hdmi_read(sd, 0x06) * 1000000) +
unsigned h_total = ((hdmi_read(sd, 0x26) & 0x3f) * 256 + ((hdmi_read(sd, 0x3b) & 0x30) >> 4) * 250000;
hdmi_read(sd, 0x27)) / 2;
unsigned freq = (((hdmi_read(sd, 0x51) << 1) +
(hdmi_read(sd, 0x52) >> 7)) * 1000000) +
((hdmi_read(sd, 0x52) & 0x7f) * 1000000) / 128;
int i;
if (is_hdmi(sd)) { if (is_hdmi(sd)) {
/* adjust for deep color mode */ /* adjust for deep color mode */
freq = freq * 8 / (((hdmi_read(sd, 0x0b) & 0xc0)>>6) * 2 + 8); freq = freq * 8 / (((hdmi_read(sd, 0x0b) & 0xc0) >> 5) + 8);
} }
bt->pixelclock = freq;
/* No lock? */ bt->hfrontporch = (hdmi_read(sd, 0x20) & 0x03) * 256 +
if (!lock) {
v4l2_dbg(1, debug, sd, "%s: no lock on TMDS signal\n", __func__);
return -ENOLCK;
}
/* Interlaced? */
if (interlaced) {
v4l2_dbg(1, debug, sd, "%s: interlaced video not supported\n", __func__);
return -ERANGE;
}
for (i = 0; v4l2_dv_timings_presets[i].bt.width; i++) {
const struct v4l2_bt_timings *bt = &v4l2_dv_timings_presets[i].bt;
if (!v4l2_valid_dv_timings(&v4l2_dv_timings_presets[i],
adv7842_get_dv_timings_cap(sd),
adv7842_check_dv_timings, NULL))
continue;
if (w_total != htotal(bt) || h_total != vtotal(bt))
continue;
if (w != bt->width || h != bt->height)
continue;
if (abs(freq - bt->pixelclock) > 1000000)
continue;
*timings = v4l2_dv_timings_presets[i];
return 0;
}
timings->type = V4L2_DV_BT_656_1120;
bt->width = w;
bt->height = h;
bt->interlaced = (hdmi_read(sd, 0x0b) & 0x20) ?
V4L2_DV_INTERLACED : V4L2_DV_PROGRESSIVE;
bt->polarities = ((hdmi_read(sd, 0x05) & 0x10) ?
V4L2_DV_VSYNC_POS_POL : 0) | ((hdmi_read(sd, 0x05) & 0x20) ?
V4L2_DV_HSYNC_POS_POL : 0);
bt->pixelclock = (((hdmi_read(sd, 0x51) << 1) +
(hdmi_read(sd, 0x52) >> 7)) * 1000000) +
((hdmi_read(sd, 0x52) & 0x7f) * 1000000) / 128;
bt->hfrontporch = (hdmi_read(sd, 0x20) & 0x1f) * 256 +
hdmi_read(sd, 0x21); hdmi_read(sd, 0x21);
bt->hsync = (hdmi_read(sd, 0x22) & 0x1f) * 256 + bt->hsync = (hdmi_read(sd, 0x22) & 0x03) * 256 +
hdmi_read(sd, 0x23); hdmi_read(sd, 0x23);
bt->hbackporch = (hdmi_read(sd, 0x24) & 0x1f) * 256 + bt->hbackporch = (hdmi_read(sd, 0x24) & 0x03) * 256 +
hdmi_read(sd, 0x25); hdmi_read(sd, 0x25);
bt->vfrontporch = ((hdmi_read(sd, 0x2a) & 0x3f) * 256 + bt->vfrontporch = ((hdmi_read(sd, 0x2a) & 0x1f) * 256 +
hdmi_read(sd, 0x2b)) / 2; hdmi_read(sd, 0x2b)) / 2;
bt->il_vfrontporch = ((hdmi_read(sd, 0x2c) & 0x3f) * 256 + bt->vsync = ((hdmi_read(sd, 0x2e) & 0x1f) * 256 +
hdmi_read(sd, 0x2d)) / 2; hdmi_read(sd, 0x2f)) / 2;
bt->vsync = ((hdmi_read(sd, 0x2e) & 0x3f) * 256 + bt->vbackporch = ((hdmi_read(sd, 0x32) & 0x1f) * 256 +
hdmi_read(sd, 0x2f)) / 2; hdmi_read(sd, 0x33)) / 2;
bt->il_vsync = ((hdmi_read(sd, 0x30) & 0x3f) * 256 + bt->polarities = ((hdmi_read(sd, 0x05) & 0x10) ? V4L2_DV_VSYNC_POS_POL : 0) |
hdmi_read(sd, 0x31)) / 2; ((hdmi_read(sd, 0x05) & 0x20) ? V4L2_DV_HSYNC_POS_POL : 0);
bt->vbackporch = ((hdmi_read(sd, 0x32) & 0x3f) * 256 + if (bt->interlaced == V4L2_DV_INTERLACED) {
hdmi_read(sd, 0x33)) / 2; bt->height += (hdmi_read(sd, 0x0b) & 0x0f) * 256 +
bt->il_vbackporch = ((hdmi_read(sd, 0x34) & 0x3f) * 256 + hdmi_read(sd, 0x0c);
hdmi_read(sd, 0x35)) / 2; bt->il_vfrontporch = ((hdmi_read(sd, 0x2c) & 0x1f) * 256 +
hdmi_read(sd, 0x2d)) / 2;
bt->standards = 0; bt->il_vsync = ((hdmi_read(sd, 0x30) & 0x1f) * 256 +
bt->flags = 0; hdmi_read(sd, 0x31)) / 2;
bt->vbackporch = ((hdmi_read(sd, 0x34) & 0x1f) * 256 +
hdmi_read(sd, 0x35)) / 2;
}
adv7842_fill_optional_dv_timings_fields(sd, timings);
} else { } else {
/* Interlaced? */ /* Interlaced? */
if (stdi.interlaced) { if (stdi.interlaced) {
@ -1437,6 +1393,8 @@ static int adv7842_s_dv_timings(struct v4l2_subdev *sd,
struct v4l2_bt_timings *bt; struct v4l2_bt_timings *bt;
int err; int err;
v4l2_dbg(1, debug, sd, "%s:\n", __func__);
if (state->mode == ADV7842_MODE_SDP) if (state->mode == ADV7842_MODE_SDP)
return -ENODATA; return -ENODATA;