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More SVE/SME fixes for ptrace() and for the (potentially future) case
where SME is implemented in hardware without SVE support. -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEE5RElWfyWxS+3PLO2a9axLQDIXvEFAmTNQv8ACgkQa9axLQDI XvF2lRAAhdMMFciXgU4KY13GnggPh83INemqDVgwdaOHb75Ucx/reDpSd6d2TaSo 0m3bK4vCI46xzWSRT4VGItvuUGwtpf8zQB+x6Gv9Kv/FWjRjsgvzcyflh+mn3C6X LTSSk9yC/mS71cutJil/Otyf8YWjpGHX8T3ki4heqyrBxIzfYnovoVQhiqxuErj7 KXitCCHqgmP0VwL14QGa+J5keThwv85xH/AtVMJa+Z1u/dYOfBGoahnuDGGDWzad shEHvLVVj7P25Bnp9ncdsHAhrumCOHFJ2c8UG71nGJH+ZGUQxcVJOXVJch/34kGj dBK6T+yASER5lt8vKsDfqwRx0KSTziF4ACDl3rGLei48qRSfMRVtkOSHuVcp/DtJ jTqj4oZswU3zokv8otMxWQHK+2uKlWXTcv3xeD154laX7+D0Tp/Og0h+ZDkpHU1N UfeuR0DwYYVEMLJo+Z1hGJ1qgrcx8qYveSDq9e4G4XaoIE7PjUEASCZ62aAXNQXB KpOUZ3h3Vrr++OMzHQ+fVcDvOcxyaSGiSuZIjfYy5S8oOz8jgsDZZaxzJEWz32ns fl3gRcVxPY65iFCL7Lnut8t+jmbvIIWzVjIOq1OICWFhDk/rQoB/KvFp+8b9ngpn GkAxuS5WZuIDyAKWf04nk4GX4vtDNARTvaRSC0y93H9JpU+dB7c= =Xy/A -----END PGP SIGNATURE----- Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux Pull arm64 fixes from Catalin Marinas: "More SVE/SME fixes for ptrace() and for the (potentially future) case where SME is implemented in hardware without SVE support" * tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: arm64/fpsimd: Sync and zero pad FPSIMD state for streaming SVE arm64/fpsimd: Sync FPSIMD state with SVE for SME only systems arm64/ptrace: Don't enable SVE when setting streaming SVE arm64/ptrace: Flush FP state when setting ZT0 arm64/fpsimd: Clear SME state in the target task when setting the VL
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commit
e6fda526d9
@ -679,7 +679,7 @@ static void fpsimd_to_sve(struct task_struct *task)
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void *sst = task->thread.sve_state;
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struct user_fpsimd_state const *fst = &task->thread.uw.fpsimd_state;
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if (!system_supports_sve())
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if (!system_supports_sve() && !system_supports_sme())
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return;
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vq = sve_vq_from_vl(thread_get_cur_vl(&task->thread));
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@ -705,7 +705,7 @@ static void sve_to_fpsimd(struct task_struct *task)
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unsigned int i;
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__uint128_t const *p;
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if (!system_supports_sve())
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if (!system_supports_sve() && !system_supports_sme())
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return;
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vl = thread_get_cur_vl(&task->thread);
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@ -835,7 +835,8 @@ void sve_sync_from_fpsimd_zeropad(struct task_struct *task)
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void *sst = task->thread.sve_state;
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struct user_fpsimd_state const *fst = &task->thread.uw.fpsimd_state;
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if (!test_tsk_thread_flag(task, TIF_SVE))
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if (!test_tsk_thread_flag(task, TIF_SVE) &&
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!thread_sm_enabled(&task->thread))
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return;
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vq = sve_vq_from_vl(thread_get_cur_vl(&task->thread));
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@ -909,7 +910,7 @@ int vec_set_vector_length(struct task_struct *task, enum vec_type type,
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*/
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task->thread.svcr &= ~(SVCR_SM_MASK |
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SVCR_ZA_MASK);
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clear_thread_flag(TIF_SME);
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clear_tsk_thread_flag(task, TIF_SME);
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free_sme = true;
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}
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}
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@ -932,11 +932,13 @@ static int sve_set_common(struct task_struct *target,
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/*
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* Ensure target->thread.sve_state is up to date with target's
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* FPSIMD regs, so that a short copyin leaves trailing
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* registers unmodified. Always enable SVE even if going into
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* streaming mode.
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* registers unmodified. Only enable SVE if we are
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* configuring normal SVE, a system with streaming SVE may not
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* have normal SVE.
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*/
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fpsimd_sync_to_sve(target);
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set_tsk_thread_flag(target, TIF_SVE);
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if (type == ARM64_VEC_SVE)
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set_tsk_thread_flag(target, TIF_SVE);
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target->thread.fp_type = FP_STATE_SVE;
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BUILD_BUG_ON(SVE_PT_SVE_OFFSET != sizeof(header));
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@ -1180,6 +1182,8 @@ static int zt_set(struct task_struct *target,
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if (ret == 0)
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target->thread.svcr |= SVCR_ZA_MASK;
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fpsimd_flush_task_state(target);
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return ret;
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}
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