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dt-bindings: clock: meson: add A1 PLL clock controller bindings
Add the documentation and dt bindings for Amlogic A1 PLL clock controller. Also include new A1 clock controller dt bindings to MAINTAINERS. Signed-off-by: Jian Hu <jian.hu@amlogic.com> Signed-off-by: Dmitry Rokosov <ddrokosov@sberdevices.ru> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Link: https://lore.kernel.org/r/20230523135351.19133-4-ddrokosov@sberdevices.ru Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/amlogic,a1-pll-clkc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Amlogic A1 PLL Clock Control Unit
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maintainers:
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- Neil Armstrong <neil.armstrong@linaro.org>
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- Jerome Brunet <jbrunet@baylibre.com>
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- Jian Hu <jian.hu@jian.hu.com>
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- Dmitry Rokosov <ddrokosov@sberdevices.ru>
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properties:
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compatible:
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const: amlogic,a1-pll-clkc
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'#clock-cells':
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const: 1
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reg:
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maxItems: 1
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clocks:
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items:
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- description: input fixpll_in
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- description: input hifipll_in
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clock-names:
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items:
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- const: fixpll_in
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- const: hifipll_in
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required:
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- compatible
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- '#clock-cells'
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- reg
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- clocks
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- clock-names
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additionalProperties: false
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examples:
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- |
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apb {
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#address-cells = <2>;
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#size-cells = <2>;
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clock-controller@7c80 {
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compatible = "amlogic,a1-pll-clkc";
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reg = <0 0x7c80 0 0x18c>;
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#clock-cells = <1>;
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clocks = <&clkc_periphs_fixpll_in>,
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<&clkc_periphs_hifipll_in>;
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clock-names = "fixpll_in", "hifipll_in";
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};
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};
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@ -1888,6 +1888,7 @@ L: linux-amlogic@lists.infradead.org
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S: Maintained
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F: Documentation/devicetree/bindings/clock/amlogic*
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F: drivers/clk/meson/
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F: include/dt-bindings/clock/a1*
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F: include/dt-bindings/clock/gxbb*
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F: include/dt-bindings/clock/meson*
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20
include/dt-bindings/clock/amlogic,a1-pll-clkc.h
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20
include/dt-bindings/clock/amlogic,a1-pll-clkc.h
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/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
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/*
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* Copyright (c) 2019 Amlogic, Inc. All rights reserved.
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* Author: Jian Hu <jian.hu@amlogic.com>
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*
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* Copyright (c) 2023, SberDevices. All Rights Reserved.
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* Author: Dmitry Rokosov <ddrokosov@sberdevices.ru>
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*/
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#ifndef __A1_PLL_CLKC_H
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#define __A1_PLL_CLKC_H
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#define CLKID_FIXED_PLL 1
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#define CLKID_FCLK_DIV2 6
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#define CLKID_FCLK_DIV3 7
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#define CLKID_FCLK_DIV5 8
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#define CLKID_FCLK_DIV7 9
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#define CLKID_HIFI_PLL 10
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#endif /* __A1_PLL_CLKC_H */
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