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powerpc/fsl-rio: add support for mapping inbound windows
Add support for mapping and unmapping of inbound rapidio windows. This allows for drivers to open up a part of local memory on the rapidio network. Also applications can use this and tranfer blocks of data over the network. Signed-off-by: Martijn de Gouw <martijn.de.gouw@prodrive-technologies.com> [scottwood@freescale.com: updated commit message based on review] Signed-off-by: Scott Wood <scottwood@freescale.com>
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@ -58,6 +58,19 @@
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#define RIO_ISR_AACR 0x10120
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#define RIO_ISR_AACR_AA 0x1 /* Accept All ID */
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#define RIWTAR_TRAD_VAL_SHIFT 12
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#define RIWTAR_TRAD_MASK 0x00FFFFFF
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#define RIWBAR_BADD_VAL_SHIFT 12
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#define RIWBAR_BADD_MASK 0x003FFFFF
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#define RIWAR_ENABLE 0x80000000
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#define RIWAR_TGINT_LOCAL 0x00F00000
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#define RIWAR_RDTYP_NO_SNOOP 0x00040000
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#define RIWAR_RDTYP_SNOOP 0x00050000
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#define RIWAR_WRTYP_NO_SNOOP 0x00004000
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#define RIWAR_WRTYP_SNOOP 0x00005000
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#define RIWAR_WRTYP_ALLOC 0x00006000
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#define RIWAR_SIZE_MASK 0x0000003F
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#define __fsl_read_rio_config(x, addr, err, op) \
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__asm__ __volatile__( \
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"1: "op" %1,0(%2)\n" \
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@ -266,6 +279,89 @@ fsl_rio_config_write(struct rio_mport *mport, int index, u16 destid,
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return 0;
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}
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static void fsl_rio_inbound_mem_init(struct rio_priv *priv)
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{
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int i;
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/* close inbound windows */
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for (i = 0; i < RIO_INB_ATMU_COUNT; i++)
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out_be32(&priv->inb_atmu_regs[i].riwar, 0);
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}
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int fsl_map_inb_mem(struct rio_mport *mport, dma_addr_t lstart,
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u64 rstart, u32 size, u32 flags)
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{
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struct rio_priv *priv = mport->priv;
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u32 base_size;
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unsigned int base_size_log;
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u64 win_start, win_end;
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u32 riwar;
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int i;
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if ((size & (size - 1)) != 0)
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return -EINVAL;
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base_size_log = ilog2(size);
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base_size = 1 << base_size_log;
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/* check if addresses are aligned with the window size */
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if (lstart & (base_size - 1))
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return -EINVAL;
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if (rstart & (base_size - 1))
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return -EINVAL;
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/* check for conflicting ranges */
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for (i = 0; i < RIO_INB_ATMU_COUNT; i++) {
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riwar = in_be32(&priv->inb_atmu_regs[i].riwar);
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if ((riwar & RIWAR_ENABLE) == 0)
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continue;
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win_start = ((u64)(in_be32(&priv->inb_atmu_regs[i].riwbar) & RIWBAR_BADD_MASK))
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<< RIWBAR_BADD_VAL_SHIFT;
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win_end = win_start + ((1 << ((riwar & RIWAR_SIZE_MASK) + 1)) - 1);
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if (rstart < win_end && (rstart + size) > win_start)
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return -EINVAL;
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}
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/* find unused atmu */
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for (i = 0; i < RIO_INB_ATMU_COUNT; i++) {
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riwar = in_be32(&priv->inb_atmu_regs[i].riwar);
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if ((riwar & RIWAR_ENABLE) == 0)
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break;
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}
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if (i >= RIO_INB_ATMU_COUNT)
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return -ENOMEM;
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out_be32(&priv->inb_atmu_regs[i].riwtar, lstart >> RIWTAR_TRAD_VAL_SHIFT);
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out_be32(&priv->inb_atmu_regs[i].riwbar, rstart >> RIWBAR_BADD_VAL_SHIFT);
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out_be32(&priv->inb_atmu_regs[i].riwar, RIWAR_ENABLE | RIWAR_TGINT_LOCAL |
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RIWAR_RDTYP_SNOOP | RIWAR_WRTYP_SNOOP | (base_size_log - 1));
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return 0;
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}
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void fsl_unmap_inb_mem(struct rio_mport *mport, dma_addr_t lstart)
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{
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u32 win_start_shift, base_start_shift;
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struct rio_priv *priv = mport->priv;
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u32 riwar, riwtar;
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int i;
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/* skip default window */
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base_start_shift = lstart >> RIWTAR_TRAD_VAL_SHIFT;
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for (i = 0; i < RIO_INB_ATMU_COUNT; i++) {
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riwar = in_be32(&priv->inb_atmu_regs[i].riwar);
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if ((riwar & RIWAR_ENABLE) == 0)
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continue;
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riwtar = in_be32(&priv->inb_atmu_regs[i].riwtar);
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win_start_shift = riwtar & RIWTAR_TRAD_MASK;
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if (win_start_shift == base_start_shift) {
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out_be32(&priv->inb_atmu_regs[i].riwar, riwar & ~RIWAR_ENABLE);
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return;
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}
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}
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}
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void fsl_rio_port_error_handler(int offset)
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{
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/*XXX: Error recovery is not implemented, we just clear errors */
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@ -389,6 +485,8 @@ int fsl_rio_setup(struct platform_device *dev)
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ops->add_outb_message = fsl_add_outb_message;
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ops->add_inb_buffer = fsl_add_inb_buffer;
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ops->get_inb_message = fsl_get_inb_message;
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ops->map_inb = fsl_map_inb_mem;
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ops->unmap_inb = fsl_unmap_inb_mem;
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rmu_node = of_parse_phandle(dev->dev.of_node, "fsl,srio-rmu-handle", 0);
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if (!rmu_node) {
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@ -602,6 +700,11 @@ int fsl_rio_setup(struct platform_device *dev)
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RIO_ATMU_REGS_PORT2_OFFSET));
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priv->maint_atmu_regs = priv->atmu_regs + 1;
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priv->inb_atmu_regs = (struct rio_inb_atmu_regs __iomem *)
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(priv->regs_win +
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((i == 0) ? RIO_INB_ATMU_REGS_PORT1_OFFSET :
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RIO_INB_ATMU_REGS_PORT2_OFFSET));
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/* Set to receive any dist ID for serial RapidIO controller. */
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if (port->phy_type == RIO_PHY_SERIAL)
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@ -620,6 +723,7 @@ int fsl_rio_setup(struct platform_device *dev)
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rio_law_start = range_start;
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fsl_rio_setup_rmu(port, rmu_np[i]);
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fsl_rio_inbound_mem_init(priv);
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dbell->mport[i] = port;
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@ -50,9 +50,12 @@
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#define RIO_S_DBELL_REGS_OFFSET 0x13400
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#define RIO_S_PW_REGS_OFFSET 0x134e0
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#define RIO_ATMU_REGS_DBELL_OFFSET 0x10C40
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#define RIO_INB_ATMU_REGS_PORT1_OFFSET 0x10d60
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#define RIO_INB_ATMU_REGS_PORT2_OFFSET 0x10f60
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#define MAX_MSG_UNIT_NUM 2
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#define MAX_PORT_NUM 4
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#define RIO_INB_ATMU_COUNT 4
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struct rio_atmu_regs {
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u32 rowtar;
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@ -63,6 +66,15 @@ struct rio_atmu_regs {
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u32 pad2[3];
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};
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struct rio_inb_atmu_regs {
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u32 riwtar;
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u32 pad1;
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u32 riwbar;
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u32 pad2;
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u32 riwar;
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u32 pad3[3];
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};
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struct rio_dbell_ring {
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void *virt;
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dma_addr_t phys;
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@ -99,6 +111,7 @@ struct rio_priv {
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void __iomem *regs_win;
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struct rio_atmu_regs __iomem *atmu_regs;
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struct rio_atmu_regs __iomem *maint_atmu_regs;
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struct rio_inb_atmu_regs __iomem *inb_atmu_regs;
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void __iomem *maint_win;
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void *rmm_handle; /* RapidIO message manager(unit) Handle */
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};
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